ATMEGA8A-AU Atmel, ATMEGA8A-AU Datasheet - Page 79

• Manufacturer Part Number: ATMEGA8A-AU
• Description: MCU AVR 8K FLASH 16MHZ 32-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8A-AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-TQFP, 32-VQFP
• Processor Series: ATMEGA8x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, TWI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Controller Family/series: AVR MEGA
• No. Of I/o's: 23
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 1KB
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16.2.1
8159D–AVR–02/11
Registers
Figure 16-1. 16-bit Timer/Counter Block Diagram
Note:
The Timer/Counter (TCNT1), Output Compare Registers (OCR1A/B), and Input Capture Regis-
ter (ICR1) are all 16-bit registers. Special procedures must be followed when accessing the 16-
bit registers. These procedures are described in the section
page
access restrictions. Interrupt requests (abbreviated to Int.Req. in the figure) signals are all visible
in the Timer Interrupt Flag Register (TIFR). All interrupts are individually masked with the Timer
Interrupt Mask Register (TIMSK). TIFR and TIMSK are not shown in the figure since these regis-
ters are shared by other timer units.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on
the T1 pin. The Clock Select logic block controls which clock source and edge the Timer/Counter
uses to increment (or decrement) its value. The Timer/Counter is inactive when no clock source
is selected. The output from the clock select logic is referred to as the timer clock (clk
The double buffered Output Compare Registers (OCR1A/B) are compared with the Timer/Coun-
ter value at all time. The result of the compare can be used by the waveform generator to
generate a PWM or variable frequency output on the Output Compare Pin (OC1A/B).
81. The Timer/Counter Control Registers (TCCR1A/B) are 8-bit registers and have no CPU
1. Refer to
Timer/Counter1 pin placement and description.
“Pin Configurations” on page
Timer/Counter
TCCRnA
OCRnB
OCRnA
TCNTn
ICRn
=
=
Direction
Count
Clear
Control Logic
TOP
=
TCCRnB
2,
Table 12-2 on page
Values
BOTTOM
Fixed
TOP
ICFn (Int.Req.)
(1)
clk
Detector
Edge
=
Tn
0
“Accessing 16-bit Registers” on
58, and
OCFnA
(Int. Req.)
OCFnB
(Int.Req.)
TOVn
(Int. Req.)
Clock Select
Generation
Generation
( From Prescaler )
Waveform
Waveform
Canceler
Detector
Noise
Edge
Table 12-8 on page 63
ATmega8A
Comparator Ouput )
( From Analog
OCnB
OCnA
ICPn
T
Tn
1
See “Out-
).
for
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