AT91SAM7S32B-AU-999 Atmel, AT91SAM7S32B-AU-999 Datasheet - Page 154

• Manufacturer Part Number: AT91SAM7S32B-AU-999
• Description: IC MCU ARM7 32KB FLASH 48LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7S32B-AU-999

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: I²C, SPI, SSC, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, JTAG, SPI, USART
• Maximum Clock Frequency: 55 MHz
• Number Of Programmable I/os: 21
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM7S-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7S-EK
• Minimum Operating Temperature: - 40 C
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

22.4
Table 22-1.
Note:
154
Offset
0x100
0x104
0x108
0x10C
0x110
0x114
0x118
0x11C
0x120
0x124
Peripheral DMA Controller (PDC) User Interface
1. PERIPH: Ten registers are mapped in the peripheral memory space at the same offset. These can be defined by the user
AT91SAM7S Series Preliminary
according to the function and the peripheral desired (DBGU, USART, SSC, SPI, MCI etc).
Register
Transmit Pointer Register
PDC Transfer Control Register
PDC Transfer Status Register
Receive Pointer Register
Receive Counter Register
Transmit Counter Register
Receive Next Pointer Register
Receive Next Counter Register
Transmit Next Pointer Register
Transmit Next Counter Register
Register Mapping
Register Name
PERIPH
PERIPH_RCR
PERIPH_TPR
PERIPH_TCR
PERIPH_RNPR
PERIPH_RNCR
PERIPH_TNPR
PERIPH_TNCR
PERIPH_PTCR
PERIPH_PTSR
(1)
_RPR
Access
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Write-only
Read-only
6175K–ATARM–30-Aug-10
0x0
0x0
0x0
0x0
0x0
0x0
-
0x0
Reset
0x0
0x0