PIC18LF2221-I/SO Microchip Technology, PIC18LF2221-I/SO Datasheet - Page 264
![IC PIC MCU FLASH 2KX16 28SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC18LF2221-I/SO
Manufacturer Part Number
PIC18LF2221-I/SO
Description
IC PIC MCU FLASH 2KX16 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(402 pages)
2.PIC18F2221-ISO.pdf
(8 pages)
3.PIC18F2221-ISO.pdf
(30 pages)
4.PIC18F2221-ISO.pdf
(46 pages)
5.PIC18LF2221-IML.pdf
(394 pages)
6.PIC18F2321-IML.pdf
(396 pages)
Specifications of PIC18LF2221-I/SO
Core Size
8-Bit
Program Memory Size
4KB (2K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC18F2221-ISO PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F2221-ISO PDF datasheet #3
- PIC18F2221-ISO PDF datasheet #4
- PIC18LF2221-IML PDF datasheet #5
- PIC18F2321-IML PDF datasheet #6
- Current page: 264 of 402
- Download datasheet (7Mb)
PIC18F2221/2321/4221/4321 FAMILY
REGISTER 24-5:
DS39689F-page 264
bit 7
bit 6
bit 5-4 BBSIZ<1:0>: Boot Block Size Select bits
bit 3
bit 2
bit 1
bit 0
DEBUG: Background Debugger Enable bit
1 = Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins
0 = Background debugger enabled, RB6 and RB7 are dedicated to in-circuit debug
XINST: Extended Instruction Set Enable bit
1 = Instruction set extension and Indexed Addressing mode enabled
0 = Instruction set extension and Indexed Addressing mode disabled (Legacy mode)
PIC18F4221/4321 Devices:
1x = 1024 Words
01 = 512 Words
00 = 256 Words
PIC18F2221/2321 Devices:
1x = 512 Words
x1 = 512 Words
00 = 256 Words
Reserved: Maintain as ‘0’
LVP: Single-Supply ICSP™ Enable bit
1 = Single-Supply ICSP enabled
0 = Single-Supply ICSP disabled
Unimplemented: Read as ‘0’
STVREN: Stack Full/Underflow Reset Enable bit
1 = Stack full/underflow will cause Reset
0 = Stack full/underflow will not cause Reset
CONFIG4L: CONFIGURATION REGISTER 4 LOW (BYTE ADDRESS 300006h)
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
DEBUG
R/P-1
XINST
R/P-0
r = Reserved bit, program as ‘0’
C = Clearable bit
BBSIZ1
U-0
BBSIZ0
U-0
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
r-0
—
R/P-1
LVP
© 2009 Microchip Technology Inc.
U-0
—
STVREN
R/P-1
bit 0
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