PIC18LF2221-I/SO Microchip Technology, PIC18LF2221-I/SO Datasheet - Page 56
![IC PIC MCU FLASH 2KX16 28SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC18LF2221-I/SO
Manufacturer Part Number
PIC18LF2221-I/SO
Description
IC PIC MCU FLASH 2KX16 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(402 pages)
2.PIC18F2221-ISO.pdf
(8 pages)
3.PIC18F2221-ISO.pdf
(30 pages)
4.PIC18F2221-ISO.pdf
(46 pages)
5.PIC18LF2221-IML.pdf
(394 pages)
6.PIC18F2321-IML.pdf
(396 pages)
Specifications of PIC18LF2221-I/SO
Core Size
8-Bit
Program Memory Size
4KB (2K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC18F2221-ISO PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F2221-ISO PDF datasheet #3
- PIC18F2221-ISO PDF datasheet #4
- PIC18LF2221-IML PDF datasheet #5
- PIC18F2321-IML PDF datasheet #6
- Current page: 56 of 402
- Download datasheet (7Mb)
PIC18F2221/2321/4221/4321 FAMILY
TABLE 5-4:
DS39689F-page 56
FSR1H
FSR1L
BSR
INDF2
POSTINC2
POSTDEC2
PREINC2
PLUSW2
FSR2H
FSR2L
STATUS
TMR0H
TMR0L
T0CON
OSCCON
HLVDCON
WDTCON
RCON
TMR1H
TMR1L
T1CON
TMR2
PR2
T2CON
SSPBUF
SSPADD
SSPSTAT
SSPCON1
SSPCON2
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Note 1:
Register
2:
3:
4:
5:
(4)
Shaded cells indicate conditions do not apply for the designated device.
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
See Table 5-3 for Reset value for specific condition.
Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When
not enabled as PORTA pins, they are disabled and read ‘0’.
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
2221 2321 4221 4321
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Applicable Devices
Brown-out Reset
Power-on Reset,
---- 0000
xxxx xxxx
---- 0000
---- 0000
xxxx xxxx
---x xxxx
0000 0000
xxxx xxxx
1111 1111
0100 q000
0-00 0101
---- ---0
0q-1 11q0
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
1111 1111
-000 0000
xxxx xxxx
0000 0000
0000 0000
0000 0000
0000 0000
N/A
N/A
N/A
N/A
N/A
RESET Instruction,
MCLR Resets,
Stack Resets
---- 0000
uuuu uuuu
---- 0000
---- 0000
uuuu uuuu
---u uuuu
0000 0000
uuuu uuuu
1111 1111
0100 q000
0-00 0101
---- ---0
0q-q qquu
uuuu uuuu
uuuu uuuu
u0uu uuuu
0000 0000
1111 1111
-000 0000
uuuu uuuu
0000 0000
0000 0000
0000 0000
0000 0000
WDT Reset,
N/A
N/A
N/A
N/A
N/A
© 2009 Microchip Technology Inc.
Wake-up via WDT
---- uuuu
uuuu uuuu
---- uuuu
---- uuuu
uuuu uuuu
---u uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuqu
u-uu uuuu
---- ---u
uq-u qquu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
1111 1111
-uuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
or Interrupt
N/A
N/A
N/A
N/A
N/A
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