AT89LP6440-20PU Atmel, AT89LP6440-20PU Datasheet - Page 71

MCU 8051 64K FLASH ISP 40PDIP

AT89LP6440-20PU

Manufacturer Part Number
AT89LP6440-20PU
Description
MCU 8051 64K FLASH ISP 40PDIP
Manufacturer
Atmel
Series
89LPr
Datasheet

Specifications of AT89LP6440-20PU

Core Processor
8051
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
38
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
8K x 8
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 13-4.
13.2
3706A–MICRO–9/09
T2CCF Address = 0D5H
Not Bit Addressable
Bit
Symbol
CCFD
CCFC
CCFB
CCFA
Input Capture Mode
7
Function
Channel D Compare/Capture Interrupt Flag. Set by a compare/capture event on channel D. Must be cleared by software.
CCFD will generate an interrupt when CIEND = 1 and ECC = 1.
Channel C Compare/Capture Interrupt Flag. Set by a compare/capture event on channel C. Must be cleared by
software. CCFC will generate an interrupt when CIENC = 1 and ECC = 1.
Channel B Compare/Capture Interrupt Flag. Set by a compare/capture event on channel B. Must be cleared by software.
CCFB will generate an interrupt when CIENB = 1 and ECC = 1.
Channel A Compare/Capture Interrupt Flag. Set by a compare/capture event on channel A. Must be cleared by software.
CCFA will generate an interrupt when CIENA = 1 and ECC = 1.
T2CCF – Timer/Counter 2 Compare/Capture Flags
The Compare/Capture Array provides a variety of capture modes suitable for time-stamping
events or performing measurements of pulse width, frequency, slope, etc. CCA channels are
configured for capture mode by clearing the CCMx bit in the associated CCCx register to 0.
Each time a capture event occurs, the contents of Timer 2 (TH2 and TL2) are transferred to the
16-bit data register of the corresponding channel, and the channel’s interrupt flag CCFx is set in
T2CCF. Optionally, the capture event may also clear Timer 2 to 0000H by setting the CTCx bit in
CCCx. The capture event is defined by the CxM
internally generated. A diagram of a CCA channel in capture mode is shown in
Figure 13-2. CCA Capture Mode Diagram
Each CCA channel has an associated external capture input pin: CCA (P2.0), CCB (P2.1), CCC
(P2.2) and CCD (P2.3). External capture events are always edge-triggered and can be selected
6
(P2.x) CCx
5
Timer 0 Overflow
Timer 1 Overflow
Comparator A
Comparator B
4
“0”
0
1
2
3
4
5
6
7
CCFD
CTCx
3
CxM
AT89LP6440 - Preliminary
2-0
2-0
bits in CCCx and may be either externally or
T2CCL
CCFC
CCxL
00H
TL2
2
T2CCH
CCxH
00H
TH2
Reset Value = XXXX 0000B
CCFB
1
T2CCC
CCCx
CIENx
CCFx
Figure
CCFA
0
13-2.
Interrupt
71

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