PIC16C642-04/SO Microchip Technology, PIC16C642-04/SO Datasheet - Page 42

• Manufacturer Part Number: PIC16C642-04/SO
• Description: IC MCU OTP 4KX14 COMP 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C642-04/SO

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Core Processor: PIC
• Speed: 4MHz
• Peripherals: Brown-out Detect/Reset, LED, POR, WDT
• Number Of I /o: 22
• Program Memory Type: OTP
• Ram Size: 176 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOIC (7.5mm Width)
• Controller Family/series: PIC16C
• No. Of I/o's: 22
• Ram Memory Size: 176Byte
• Cpu Speed: 4MHz
• No. Of Timers: 1
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 176 B
• Interface Type: RS- 232
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 8
• Operating Supply Voltage: 3 V to 6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

PIC16C64X & PIC16C66X
FIGURE 6-3:
FIGURE 6-4:
DS30559A-page 42
Instruction
PC
(Program
Counter)
Fetch
Instruction
Execute
TMR0
INSTRUCTION
FLOW
GIE bit
(INTCON<7>)
T0IF bit
(INTCON<2>)
Instruction
fetched
Instruction
executed
Timer0
CLKOUT(3)
OSC1
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
PC
T0
Note 1: Interrupt flag bit T0IF is sampled here (every Q1).
PC-1
TIMER0 TIMING: INTERNAL CLOCK/PRESCALE 1:2
TIMER0 INTERRUPT TIMING
Q1
2: Interrupt latency = 4Tcy where Tcy = instruction cycle time.
3: CLKOUT is available only in RC oscillator mode.
FEh
Inst (PC)
Inst (PC-1)
Q2
1
PC
MOVWF TMR0
Q3
PC
T0+1
Q4
MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W
Q1
Write TMR0
executed
FFh
PC+1
Inst (PC+1)
Inst (PC)
Q2
1
PC +1
Q3
Preliminary
Read TMR0
reads NT0
Q4
PC+2
Q1
00h
Dummy cycle
Q2
Read TMR0
reads NT0
PC +1
PC+3
Q3
NT0
Q4
MOVF TMR0,W
Read TMR0
reads NT0
Q1
PC+4
01h
Dummy cycle
Inst (0004h)
Q2
0004h
MOVF TMR0,W
Q3
Read TMR0
reads NT0
1996 Microchip Technology Inc.
PC+5
Q4
Q1
Read TMR0
reads NT0 + 1
02h
NT0+1
Inst (0004h)
Inst (0005h)
PC+6
Q2
0005h
Q3
Q4
T0