PIC16C642-04/SO Microchip Technology, PIC16C642-04/SO Datasheet - Page 54

IC MCU OTP 4KX14 COMP 28SOIC

PIC16C642-04/SO

Manufacturer Part Number
PIC16C642-04/SO
Description
IC MCU OTP 4KX14 COMP 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets

Specifications of PIC16C642-04/SO

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Core Processor
PIC
Speed
4MHz
Peripherals
Brown-out Detect/Reset, LED, POR, WDT
Number Of I /o
22
Program Memory Type
OTP
Ram Size
176 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC16C
No. Of I/o's
22
Ram Memory Size
176Byte
Cpu Speed
4MHz
No. Of Timers
1
Processor Series
PIC16C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
176 B
Interface Type
RS- 232
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
33
Number Of Timers
8
Operating Supply Voltage
3 V to 6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
0 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
PIC16C64X & PIC16C66X
8.1
The Voltage Reference Module can output 16 distinct
voltage levels for each range.
The equations used to calculate the output of the
Voltage Reference are as follows:
The settling time of the Voltage Reference must be
considered
(Table 12-2). Example 8-1 shows an example of how to
configure the Voltage Reference for an output voltage
of 1.25V with V
EXAMPLE 8-1:
MOVLW
MOVWF
BSF
MOVLW
MOVWF
MOVLW
MOVWF
BCF
CALL
8.2
The full range of V
the construction of the module. The transistors on the
top and bottom of the resistor ladder network
(Figure 8-2) keep V
The Voltage Reference is V
FIGURE 8-3:
TABLE 8-1:
DS30559A-page 54
Address Name
9Fh
1Fh
85h
Note 1: R is dependent upon the Voltage Reference Configuration VRCON<3:0> and VRCON<5>.
If VRR = 1
Then V
If VRR = 0
Then V
Configuring the Voltage Reference
Voltage Reference Accuracy/Error
0x02
CMCON
STATUS,RP0
0x07
TRISA
0xA6
VRCON
STATUS,RP0
DELAY_10 s
VRCON
CMCON
TRISA
REF
REF
when
DD
= (VR3:VR0/24) • V
= (V
VOLTAGE REFERENCE OUTPUT BUFFER EXAMPLE
REGISTERS ASSOCIATED WITH VOLTAGE REFERENCE
= 5.0V.
SS
REF
V
Module
DD
VOLTAGE REFERENCE
CONFIGURATION
C2OUT
REF
VREN
to V
Bit 7
changing
• 1/4) + (VR3:VR0/32) • V
PIC16C662
from approaching V
; 4 inputs muxed
; to 2 comparators
; Select Bank 1
; RA3:RA0 to outputs
;
; enable Vref low
; range, VR3:VR0 = 6
; Select Bank 0
DD
; 10
Voltage
Reference
Output
Impedance
DD
cannot be realized due to
C1OUT
VROE
Bit 6
derived and therefore,
R
the
(1)
s delay
DD
TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 --11 1111
Pin RA2
Bit 5
VRR
V
REF
SS
or V
output
Bit 4
DD
Preliminary
DD
.
Bit 3
VR3
CIS
the V
absolute accuracy of the Voltage Reference can be
found in Table 12-3.
8.3
When the device wakes up from sleep through an
interrupt or a Watchdog Timer time-out, the contents of
the VRCON register are not affected. To minimize
current consumption in SLEEP mode, the Voltage
Reference Module should be disabled.
8.4
A device reset disables the Voltage Reference by clear-
ing
disconnects the reference from the RA2 pin by clearing
bit VROE (VRCON<6>) and selects the high voltage
range by clearing bit VRR (VRCON<5>). The V
value select bits, VRCON<3:0>, are also cleared.
8.5
The Voltage Reference Module operates independently
of the comparator module. The output of the reference
generator may be connected to the RA2 pin if the
TRISA<2> bit is set and bit VROE is set. Enabling the
Voltage Reference output onto the RA2 pin with an
input signal present will increase current consumption.
Connecting RA2 as a digital output with V
will also increase current consumption.
The RA2 pin can be used as a simple D/A output with
limited drive capability. Due to the limited drive
capability, a buffer must be used in conjunction with the
Voltage Reference output for external connections to
V
technique.
REF
Bit 2
CM2
VR2
.
REF
bit
Figure 8-3
Operation During Sleep
Effects of a Reset
Connection Considerations
output changes with fluctuations in V
VREN
Bit 1
CM1
VR1
(VRCON<7>).
V
shows
Bit 0
CM0
VR0
REF
output
1996 Microchip Technology Inc.
000- 0000
00-- 0000
an
Value On
POR,
BOR
example
This
REF
000- 0000
00-- 0000
--11 1111
reset
Value on
all other
resets
buffering
enabled
DD
. The
also
REF

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