ATMEGA644V-10MUR Atmel, ATMEGA644V-10MUR Datasheet - Page 288

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ATMEGA644V-10MUR

Manufacturer Part Number
ATMEGA644V-10MUR
Description
MCU AVR 64K FLASH 10MHZ 44QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA644V-10MUR

Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
288
ATmega644
The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a positive pulse.
The bit coding is shown in
When pulsing WR or OE, the command loaded determines the action executed. The different
commands are shown in
Figure 25-1. Parallel Programming
Note:
Table 25-9.
Programming Mode
Signal Name in
RDY/BSY
1. Unused Pins should be left floating.
PAGEL
DATA
BS1
XA0
XA1
BS2
WR
OE
Pin Name Mapping
Table
RDY/BSY
Pin Name
Table
PAGEL
PB7-0
+12V
BS2
PD1
PD2
PD3
PD4
PD5
PD6
PD7
BS1
XA0
XA1
PA0
WR
OE
25-13.
25-12.
(1)
I/O
I/O
PD1
PD2
PD3
PD4
PD5
PD6
PD7
RESET
XTAL1
GND
O
PA0
I
I
I
I
I
I
I
Function
0: Device is busy programming, 1: Device is ready for
new command.
Output Enable (Active low).
Write Pulse (Active low).
XTAL Action Bit 0
XTAL Action Bit 1
Program Memory and EEPROM data Page Load.
Byte Select 2.
Byte Select 1.
Bi-directional Data bus (Output when OE is low).
PB7 - PB0
AVCC
VCC
+5V
+5V
DATA
2593N–AVR–07/10

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