ATMEGA645P-MU Atmel, ATMEGA645P-MU Datasheet - Page 237
![IC MCU AVR 64K FLASH 64QFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
ATMEGA645P-MU
Manufacturer Part Number
ATMEGA645P-MU
Description
IC MCU AVR 64K FLASH 64QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA645P-MU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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23.7
23.7.1
23.7.2
23.7.3
23.7.4
23.8
8285B–AVR–03/11
On-chip Debug Specific JTAG Instructions
Using the JTAG Programming Capabilities
PRIVATE0; 0x8
PRIVATE1; 0x9
PRIVATE2; 0xA
PRIVATE3; 0xB
ATmega165A/165PA/325A/325PA/3250A/3250PA/6
A debugger, like the AVR Studio, may however use one or more of these resources for its inter-
nal purpose, leaving less flexibility to the end-user.
A list of the On-chip Debug specific JTAG instructions is given in
Instructions” on page
The JTAGEN Fuse must be programmed to enable the JTAG Test Access Port. In addition, the
OCDEN Fuse must be programmed and no Lock bits must be set for the On-chip debug system
to work. As a security feature, the On-chip debug system is disabled when either of the LB1 or
LB2 Lock bits are set. Otherwise, the On-chip debug system would have provided a back-door
into a secured device.
The AVR Studio enables the user to fully control execution of programs on an AVR device with
On-chip Debug capability, AVR In-Circuit Emulator, or the built-in AVR Instruction Set Simulator.
AVR Studio
poration’s AVR Assembler and C programs compiled with third party vendors’ compilers.
AVR Studio runs under Microsoft
For a full description of the AVR Studio, please refer to the AVR Studio User Guide. Only high-
lights are presented in this document.
All necessary execution commands are available in AVR Studio, both on source level and on
disassembly level. The user can execute the program, single step through the code either by
tracing into or stepping over functions, step out of functions, place the cursor on a statement and
execute until the statement is reached, stop the execution, and reset the execution target. In
addition, the user can have an unlimited number of code Break Points (using the BREAK
instruction) and up to two data memory Break Points, alternatively combined as a mask (range)
Break Point.
The On-chip debug support is considered being private JTAG instructions, and distributed within
ATMEL and to selected third party vendors only. Instruction opcodes are listed for reference.
Private JTAG instruction for accessing On-chip debug system.
Private JTAG instruction for accessing On-chip debug system.
Private JTAG instruction for accessing On-chip debug system.
Private JTAG instruction for accessing On-chip debug system.
Programming of AVR parts via JTAG is performed via the 4-pin JTAG port, TCK, TMS, TDI, and
TDO. These are the only pins that need to be controlled/observed to perform JTAG program-
ming (in addition to power pins). It is not required to apply 12V externally. The JTAGEN Fuse
must be programmed and the JTD bit in the MCUCR Register must be cleared to enable the
JTAG Test Access Port. See
®
supports source level execution of Assembly programs assembled with Atmel Cor-
237.
”Boundary-scan Related Register in I/O Memory” on page
®
Windows
®
95/98/2000, Windows NT
”On-chip Debug Specific JTAG
®
and Windows XP
265.
®
.
237
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