PIC16C72-10/SP Microchip Technology, PIC16C72-10/SP Datasheet - Page 91

• Manufacturer Part Number: PIC16C72-10/SP
• Description: IC MCU OTP 2KX14 A/D PWM 28DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C72-10/SP

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Data Converters: A/D 5x8b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: PIC16C72-10/SPR; PIC16C72-10/SPR

TABLE 13-8
TABLE 13-9
Param
1998 Microchip Technology Inc.
No.
Parameter
*
†
†
70
71
72
73
74
75
76
77
78
79
80
No.
These parameters are characterized but not tested.
70*
71*
72*
73*
74*
75*
76*
77*
78*
79*
80*
81*
82*
83*
Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not
tested.
TssL2scH,
TssL2scL
TscH
TscL
TdiV2scH,
TdiV2scL
TscH2diL,
TscL2diL
TdoR
TdoF
TssH2doZ
TscR
TscF
TscH2doV,
TscL2doV
Sym
TssL2scH,
TssL2scL
TscH
TscL
TdiV2scH,
TdiV2scL
TscH2diL,
TscL2diL
TdoR
TdoF
TssH2doZ
TscR
TscF
TscH2doV,
TscL2doV
TdoV2scH,
TdoV2scL
TssL2doV
TscH2ssH,
TscL2ssH
SPI SLAVE MODE REQUIREMENTS (CKE=0) - PIC16C72
SPI MODE REQUIREMENTS - PIC16CR72
Sym
SS to SCK or SCK input
SCK input high time (slave mode)
SCK input low time (slave mode)
Setup time of SDI data input to SCK edge
Hold time of SDI data input to SCK edge
SDO data output rise time
SDO data output fall time
SS to SDO output hi-impedance
SCK output rise time (master mode)
SCK output fall time (master mode)
SDO data output valid after SCK edge
Characteristic
SS to SCK or SCK input
SCK input high time (slave mode)
SCK input low time (slave mode)
Setup time of SDI data input to SCK
edge
Hold time of SDI data input to SCK
edge
SDO data output rise time
SDO data output fall time
SS to SDO output hi-impedance
SCK output rise time (master mode)
SCK output fall time (master mode)
SDO data output valid after SCK
edge
SDO data output setup to SCK
edge
SDO data output valid after SS
edge
SS
after SCK edge
Characteristic
Preliminary
1.5T
T
T
CY
CY
Min
T
T
100
100
CY
10
—
—
—
—
—
—
CY
CY
+ 20
+ 20
T
T
+ 40
CY
CY
Min
T
50
50
10
—
—
—
—
—
CY
PIC16C72 Series
+ 20
+ 20
Typ†
10
10
10
10
—
—
—
—
—
—
—
—
—
—
Typ†
10
10
10
10
—
—
—
—
—
—
—
Max
25
25
50
25
25
50
50
—
—
—
—
—
—
—
Max
—
—
—
—
—
25
25
50
25
25
50
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DS39016A-page 91
Conditions
Conditions