ATMEGA3290P-20AU Atmel, ATMEGA3290P-20AU Datasheet - Page 55
![IC MCU 32K 4X40 LCD CTRL 100TQFP](/photos/6/70/67048/313-100-tqfp_sml.jpg)
ATMEGA3290P-20AU
Manufacturer Part Number
ATMEGA3290P-20AU
Description
IC MCU 32K 4X40 LCD CTRL 100TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA3290P-20AU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI, USART, USI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
69
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
100TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Controller Family/series
AVR MEGA
No. Of I/o's
69
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
20MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK504 - STARTER KIT AVR EXP MOD 100P LCDATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATMEGA3290P-16AU
ATMEGA3290P-16AU
ATMEGA3290P-16AU
Available stocks
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Manufacturer
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8021G–AVR–03/11
When the BOOTRST Fuse is unprogrammed, the Boot section size set to 4Kbytes and the
IVSEL bit in the MCUCR Register is set before any interrupts are enabled, the most typical and
general program setup for the Reset and Interrupt Vector Addresses is:
When the BOOTRST Fuse is programmed and the Boot section size set to 4Kbytes, the most
typical and general program setup for the Reset and Interrupt Vector Addresses is:
When the BOOTRST Fuse is programmed, the Boot section size set to 4Kbytes and the IVSEL
bit in the MCUCR Register is set before any interrupts are enabled, the most typical and general
program setup for the Reset and Interrupt Vector Addresses is:
0x0034
0x0035
0x0036
0x0037
Address Labels Code
0x0000
0x0001
0x0002
0x0003
0x0004
0x0005
;
.org 0x3802/0x7802
0x3804/0x7804
0x3806/0x7806
...
0x1C2C
Address Labels Code
.org 0x0002
0x0002
0x0004
...
0x002C
;
.org 0x3800/0x7800
0x3800/0x7801RESET:ldir16,high(RAMEND); Main program start
0x3801/0x7801
0x3802/0x7802
0x3803/0x7803
0x3804/0x7804
0x3805/0x7805
Address Labels Code
;
.org 0x3800/0x7800
0x3800/0x7800
0x3802/0x7802
RESET: ldi
...
out
ldi
out
sei
<instr> xxx
jmp
jmp
...
jmp
jmp
jmp
...
jmp
out
ldi
out
sei
<instr>
jmp
jmp
ldi
out
sei
<inst
r>
...
r16,high(RAMEND); Main program start
SPH,r16
r16,low(RAMEND)
SPL,r16
EXT_INT0
PCINT0
...
SPM_RDY
EXT_INT0
PCINT0
...
SPM_RDY
SPH,r16
r16,low(RAMEND)
SPL,r16
RESET
EXT_INT0
xxx
r16, low(RAMEND)
SPL,r16
xxx
...
Comments
; Set Stack Pointer to top of RAM
Comments
; Set Stack Pointer to top of RAM
; Enable interrupts
; IRQ0 Handler
; PCINT0 Handler
;
; Store Program Memory Ready Handler
; IRQ0 Handler
; PCINT0 Handler
;
; Store Program Memory Ready Handler
; Enable interrupts
Comments
; Reset handler
; IRQ0 Handler
ATmega329P/3290P
; Enable interrupts
55
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