AT32UC3B1128-Z1UR Atmel, AT32UC3B1128-Z1UR Datasheet - Page 465
AT32UC3B1128-Z1UR
Manufacturer Part Number
AT32UC3B1128-Z1UR
Description
MCU AVR32 128K FLASH 48-QFN
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet
1.AT32UC3B164-AUR.pdf
(680 pages)
Specifications of AT32UC3B1128-Z1UR
Package / Case
48-QFN Exposed Pad
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Speed
60MHz
Number Of I /o
28
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
32K x 8
Program Memory Size
128KB (128K x 8)
Data Converters
A/D 6x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Core Size
32-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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22.8.3.11
Register Name:
Access Type:
Offset:
Reset Value:
•
•
32059J–12/2010
PRSTn: Pipe n Reset
PENn: Pipe n Enable
31
23
15
7
-
-
-
-
Writing a one to this bit will reset the Pipe n FIFO.
This resets the endpoint n registers (UPCFGn, UPSTAn, UPCONn) but not the endpoint configuration (ALLOC, PBK, PSIZE,
All the endpoint mechanism (FIFO counter, reception, transmission, etc.) is reset apart from the Data Toggle management.
The endpoint configuration remains active and the endpoint is still enabled.
Writing a zero to this bit will complete the reset operation and allow to start using the FIFO.
Writing a one to this bit will enable the Pipe n.
Writing a zero to this bit will disable the Pipe n, what forces the Pipe n state to inactive and resets the pipe n registers (UPCFGn,
PTOKEN, PTYPE, PEPNUM, INTFRQ).
UPSTAn, UPCONn) but not the pipe configuration (ALLOC, PBK, PSIZE).
Pipe Enable/Reset Register
PRST6
PEN6
30
22
14
6
-
-
UPRST
Read/Write
0x0041C
0x00000000
PRST5
PEN5
29
21
13
5
-
-
PRST4
PEN4
28
20
12
4
-
-
PRST3
PEN3
27
19
11
3
-
-
PRST2
PEN2
26
18
10
2
-
-
PRST1
PEN1
25
17
9
1
-
-
AT32UC3B
PRST0
PEN0
24
16
8
0
-
-
465
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