DSPIC30F1010-20E/SP Microchip Technology, DSPIC30F1010-20E/SP Datasheet - Page 212

• Manufacturer Part Number: DSPIC30F1010-20E/SP
• Description: IC DSPIC MCU/DSP 6K 28DIP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F1010-20E/SP

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 6KB (2K x 24)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Frequency: 15MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 6KB
• Supply Voltage Range: 3V To 5.5V
• Package: 28SPDIP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 6-chx10-bit
• Number Of Timers: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300023 - KIT DEMO DSPICDEM SMPS BUCKDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

dsPIC30F1010/202X
FIGURE 18-6:
FIGURE 18-7:
DS70178C-page 210
RESET Instruction
15
15
TSEQ3 TSEQ2 TSEQ1 TUN
MCLR
TSEQ7
CLK Q
D Q0
V
Illegal Opcode/
Uninitialized W Register
DD
12 11
12
11
TSEQ6 TSEQ5 TSEQ4
CLK Q
D Q1
OSCTUN
OSCTUN2
Trap Conflict
V
TSEQEN in OSCCON
Sleep or Idle
CLK Q
Module
7
D Q2
Detect
DD
WDT
FRC TUNE DITHER LOGIC BLOCK DIAGRAM
RESET SYSTEM BLOCK DIAGRAM
4
Rise
4
3
3
D Q3
CLK Q
Glitch Filter
0
0
ROLL<5:3> ROLL<2:0>
CLK Q
Digital
D Q4
POR
3
1
2
0
3
4
5
6
8
PWM PS
ROLL Counter
4
ROLL<3>
CLK Q
D Q5
4
D Q6
CLK Q
1
0
Preliminary
PRCDEN in OSCCON
CLK
D Q
LFSR
CLK Q
D Q7
4
TUNE BIts to FRC
CLK Q
D Q8
Shift Enable for LFSR
CLK Q
D
Q9
CLK Q
D Q10
CLK Q
D Q11
S
© 2006 Microchip Technology Inc.
R
CLK Q
D Q12
All Zero Detect
Q
D Q13
CLK Q
CLK Q
D Q14
SYSRST
15