PIC18F2320-E/SP Microchip Technology, PIC18F2320-E/SP Datasheet - Page 340
![IC MCU FLASH 4KX16 EEPROM 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18F2320-E/SP
Manufacturer Part Number
PIC18F2320-E/SP
Description
IC MCU FLASH 4KX16 EEPROM 28DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F1320-ISS.pdf
(36 pages)
3.PIC18F2220-ISO.pdf
(394 pages)
4.PIC18F2220-ISO.pdf
(6 pages)
5.PIC18F2220-ISO.pdf
(6 pages)
6.PIC18F2220-ISO.pdf
(8 pages)
7.PIC18F2220-ISO.pdf
(6 pages)
8.PIC18F2220-ISO.pdf
(6 pages)
Specifications of PIC18F2320-E/SP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
For Use With
DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC18F1320-ISS PDF datasheet #2
- PIC18F2220-ISO PDF datasheet #3
- PIC18F2220-ISO PDF datasheet #4
- PIC18F2220-ISO PDF datasheet #5
- PIC18F2220-ISO PDF datasheet #6
- PIC18F2220-ISO PDF datasheet #7
- PIC18F2220-ISO PDF datasheet #8
- Current page: 340 of 394
- Download datasheet (7Mb)
PIC18F2220/2320/4220/4320
TABLE 26-16: EXAMPLE SPI MODE REQUIREMENTS (SLAVE MODE TIMING, CKE = 0)
FIGURE 26-16:
DS39599G-page 338
70
71
71A
72
72A
73
73A
74
75
76
77
78
79
80
83
Note 1:
Param
No.
Note:
(CKP = 0)
(CKP = 1)
SDI
SDI
SCK
SDO
SS
SCK
2:
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
TscH2ssH,
TscL2ssH
SS
SS
SC
SC
SC
SC
SS
SC
SC
SC
SC
Symbol
DI
DI
B
DO
DO
Requires the use of Parameter # 73A.
Only if Parameter # 71A and # 72A are used.
2
Refer to Figure 26-5 for load conditions.
V2
V2
L2
L2
H2
H2
L2
H
L
H2
L2
R
F
B
R
F
SC
SC
SC
SC
DO
DI
DO
DI
DO
L
L,
H,
L
H,
L
V
V,
Z SS ↑ to SDO Output High-Impedance
SS ↓ to SCK ↓ or SCK ↑ Input
SCK Input High Time (Slave mode)
SCK Input Low Time (Slave mode)
Setup Time of SDI Data Input to SCK Edge
Last Clock Edge of Byte 1 to the First Clock Edge of Byte 2 1.5 T
Hold Time of SDI Data Input to SCK Edge
SDO Data Output Rise Time
SDO Data Output Fall Time
SCK Output Rise Time (Master mode)
SCK Output Fall Time (Master mode)
SDO Data Output Valid after SCK Edge PIC18FXX20
SS ↑ after SCK Edge
82
EXAMPLE SPI SLAVE MODE TIMING (CKE = 1)
70
MSb In
MSb
74
71
75, 76
Characteristic
72
bit 6 - - - - - -1
bit 6 - - - -1
80
Continuous
Single Byte
Continuous
Single Byte
PIC18FXX20
PIC18LFXX20
PIC18FXX20
PIC18LFXX20
PIC18LFXX20
LSb
LSb In
1.25 T
1.25 T
1.5 T
Min
T
100
100
CY
CY
40
40
10
—
—
—
—
—
CY
CY
CY
83
+ 40
+ 40
+ 30
+ 30
© 2007 Microchip Technology Inc.
77
Max Units Conditions
100
25
45
25
50
25
45
25
50
—
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 2)
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