PIC18F4220-E/P Microchip Technology, PIC18F4220-E/P Datasheet - Page 218
![IC MCU FLASH 2KX16 EEPROM 40DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC18F4220-E/P
Manufacturer Part Number
PIC18F4220-E/P
Description
IC MCU FLASH 2KX16 EEPROM 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F1320-ISS.pdf
(36 pages)
3.PIC18F2220-ISO.pdf
(394 pages)
4.PIC18F2220-ISO.pdf
(6 pages)
5.PIC18F2220-ISO.pdf
(6 pages)
6.PIC18F2220-ISO.pdf
(8 pages)
7.PIC18F2220-ISO.pdf
(6 pages)
8.PIC18F2220-ISO.pdf
(6 pages)
Specifications of PIC18F4220-E/P
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
40-DIP (0.600", 15.24mm)
For Use With
DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LDACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F4220-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F1320-ISS PDF datasheet #2
- PIC18F2220-ISO PDF datasheet #3
- PIC18F2220-ISO PDF datasheet #4
- PIC18F2220-ISO PDF datasheet #5
- PIC18F2220-ISO PDF datasheet #6
- PIC18F2220-ISO PDF datasheet #7
- PIC18F2220-ISO PDF datasheet #8
- Current page: 218 of 394
- Download datasheet (7Mb)
PIC18F2220/2320/4220/4320
19.1
For the A/D converter to meet its specified accuracy, the
Charge Holding Capacitor (C
fully charge to the input channel voltage level. The ana-
log input model is shown in Figure 19-2. The source
impedance (R
impedance directly affect the time required to charge the
capacitor C
varies over the device voltage (V
ance affects the offset voltage at the analog input (due to
pin leakage current). The maximum recommended
impedance for analog sources is 2.5 kΩ. After the
analog input channel is selected (changed), the channel
must be sampled for at least the minimum acquisition
time before starting a conversion.
To
Equation 19-1 may be used. This equation assumes
that 1/2 LSb error is used (1024 steps for the A/D). The
1/2 LSb error is the maximum error allowed for the A/D
to meet its specified resolution.
Example 19-1 shows the calculation of the minimum
required acquisition time T
on the following application system assumptions:
C
R
Conversion Error
V
Temperature
V
EQUATION 19-1:
EQUATION 19-2:
EXAMPLE 19-1:
DS39599G-page 216
T
V
or
T
T
T
T
Temperature coefficient is only required for temperatures > 25°C. Below 25°C, T
T
T
DD
HOLD
HOLD
S
ACQ
Note:
C
ACQ
AMP
COFF
C
ACQ
HOLD
calculate
=
=
A/D Acquisition Requirements
=
=
HOLD
=
=
=
–
=
When the conversion is started, the holding
capacitor is disconnected from the input pin.
S
Amplifier Settling Time + Holding Capacitor Charging Time + Temperature Coefficient
T
) and the internal sampling switch (R
AMP
. The sampling switch (R
the
(V
-(C
+ T
REF
=
=
≤
=
=
=
T
5 μs
(Temp – 25°C)(0.05 μs/°C)
(50°C – 25°C)(0.05 μs/°C)
1.25 μs
-(C
-(120 pF) (1 kΩ + 7 kΩ + 2.5 kΩ) ln(0.0004883) μs
9.61 μs
5 μs + 1.25 μs + 9.61 μs
12.86 μs
HOLD
AMP
ACQUISITION TIME
MINIMUM A/D HOLDING CAPACITOR
CALCULATING THE MINIMUM REQUIRED ACQUISITION TIME
C
HOLD
minimum
– (V
+ T
120 pF
2.5 kΩ
1/2 LSb
5V → Rss = 7 kΩ
50°C (system max.)
0V @ time = 0
ACQ
)(R
+ T
COFF
REF
)(R
HOLD
IC
C
. This calculation is based
+ T
+ R
/2048)) • (1 – e
IC
DD
+ R
) must be allowed to
COFF
). The source imped-
SS
acquisition
+ R
SS
SS
+ R
S
) ln(1/2048)
) impedance
S
) ln(1/2047) μs
(-Tc/C
time,
HOLD
SS
)
(R
IC
+ R
SS
+ R
19.2
If external voltage references are used instead of the
internal AV
ance of the V
considered. During acquisition, currents supplied by
these sources are insignificant. However, during con-
version, the A/D module sinks and sources current
through the reference sources.
In order to maintain the A/D accuracy, the voltage ref-
erence source impedances should be kept low to
reduce voltage changes. These voltage changes occur
as reference currents flow through the reference
source impedance. The maximum recommended
impedance of the V
reference voltage sources is 75Ω.
S
Note:
))
)
A/D V
DD
COFF
When using external references, the
source impedance of the external voltage
references must be less than 75Ω in order
to achieve the specified ADC resolution. A
higher reference source impedance will
increase the ADC offset and gain errors.
Resistive voltage dividers will not provide a
low enough source impedance. To ensure
the best possible ADC performance, exter-
nal V
op amp or other low-impedance circuit.
REF
and AV
REF
= 0 μs.
REF
+ and V
+ and V
inputs should be buffered with an
SS
© 2007 Microchip Technology Inc.
REF
REF
sources, the source imped-
- voltage sources must be
+ and V
REF
- References
REF
- external
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