ATXMEGA128A1-C7U Atmel, ATXMEGA128A1-C7U Datasheet - Page 12
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ATXMEGA128A1-C7U
Manufacturer Part Number
ATXMEGA128A1-C7U
Description
MCU AVR 128K FLASH 1.6V 100VFBGA
Manufacturer
Atmel
Series
AVR® XMEGAr
Datasheet
1.ATAVRONEKIT.pdf
(113 pages)
Specifications of ATXMEGA128A1-C7U
Core Processor
AVR
Core Size
8/16-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 3.6 V
Data Converters
A/D 16x12b, D/A 4x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-VFBGA
Processor Series
XMEGA
Core
AVR
Data Bus Width
8 bit, 16 bit
Data Ram Size
8 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
78
Number Of Timers
8
Operating Supply Voltage
2.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT, ATQT600
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Figure 7-2.
7.4.1
7.4.2
7.4.3
8067M–AVR–09/10
FFFFFF
I/O Memory
SRAM Data Memory
EEPROM Data Memory
5FFF
2000
6000
Data Memory Map (Hexadecimal address)
External Memory
Internal SRAM
(0 to 16 MB)
(16 KB)
All peripherals and modules are addressable through I/O memory locations in the data memory
space. All I/O memory locations can be accessed by the Load (LD/LDS/LDD) and Store
(ST/STS/STD) instructions, transferring data between the 32 general purpose registers in the
CPU and the I/O Memory.
The IN and OUT instructions can address I/O memory locations in the range 0x00 - 0x3F
directly.
I/O registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and
CBI instructions. The value of single bits can be checked by using the SBIS and SBIC instruc-
tions on these registers.
The I/O memory address for all peripherals and modules in XMEGA A1 is shown in the
eral Module Address Map” on page
The XMEGA A1 devices has internal SRAM memory for data storage.
The XMEGA A1 devices have internal EEPROM memory for non-volatile data storage. It is
addressable either in a separate data space or it can be memory mapped into the normal data
memory space. The EEPROM memory supports both byte and page access.
Byte Address
FFFFFF
FFFFFF
10000
3FFF
2000
4000
1FFF
9FFF
1000
2000
FFF
0
58.
External Memory
External Memory
ATxmega384A1
Internal SRAM
Internal SRAM
I/O Registers
(0 to 16 MB)
(0 to 16 MB)
EEPROM
(32 KB)
(8 KB)
(4 KB)
(4 KB)
Byte Address
FFFFFF
FFFFFF
1FFF
5FFF
2FFF
1000
2000
6000
2000
3000
FFF
0
XMEGA A1
External Memory
External Memory
ATxmega256A1
Internal SRAM
Internal SRAM
I/O Registers
(0 to 16 MB)
(0 to 16 MB)
EEPROM
(16 KB)
(4 KB)
(4 KB)
(4 KB)
“Periph-
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