ATXMEGA128A1-C7U Atmel, ATXMEGA128A1-C7U Datasheet - Page 96
![MCU AVR 128K FLASH 1.6V 100VFBGA](/photos/12/32/123223/100-lfbga_sml.jpg)
ATXMEGA128A1-C7U
Manufacturer Part Number
ATXMEGA128A1-C7U
Description
MCU AVR 128K FLASH 1.6V 100VFBGA
Manufacturer
Atmel
Series
AVR® XMEGAr
Datasheet
1.ATAVRONEKIT.pdf
(113 pages)
Specifications of ATXMEGA128A1-C7U
Core Processor
AVR
Core Size
8/16-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 3.6 V
Data Converters
A/D 16x12b, D/A 4x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-VFBGA
Processor Series
XMEGA
Core
AVR
Data Bus Width
8 bit, 16 bit
Data Ram Size
8 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
78
Number Of Timers
8
Operating Supply Voltage
2.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT, ATQT600
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
8067M–AVR–09/10
28. Flash Power Reduction Mode can not be enabled when entering sleep
29. Some NVM Commands are non-functional
30. Crystal start-up time required after power-save even if crystal is source for RTC
31. Setting PRHIRES bit makes PWM output unavailable
32. Accessing EBI address space with PREBI set will lock Bus Master
If Flash Power Reduction Mode is enabled when entering Power-save or Extended Standby
sleep mode, the device will only wake up on every fourth wake-up request. If Flash Power
Reduction Mode is enabled when entering Idle sleep mode, the wake-up time will vary with
up to 16 CPU clock cycles.
Problem fix/Workaround
Disable Flash Power Reduction mode before entering sleep mode.
The following NVM commands are non-functional:
Problem fix/Workaround
None for Flash Range CRC
Use separate programming commands for accessing application and boot section.
Even if 32.768 kHz crystal is used for RTC during sleep, the clock from the crystal will not be
ready for the system before the specified start-up time. See "XOSCSEL[3:0]: Crystal Oscilla-
tor Selection" in XMEGA A Manual. If BOD is used in active mode, the BOD will be on during
this period (0.5s).
Problem fix/Workaround
If faster start-up is required, go to sleep with internal oscillator as system clock.
Setting the HIRES Power Reduction (PR) bit for PORTx will make any Frequency or PWM
output for the corresponding Timer/Counters (TCx0 and TCx1) unavailable on the pin even if
the Hi-Res is not used.
Problem fix/Workaround
Do not write the HIRES PR bit on PORTx when frequency or PWM output from TCx0/1 is
used.
–
–
–
–
–
–
–
–
–
–
0x2C
0x2D
0x2B
0x2E
0x3A
0x2A
0x2F
0x22
0x24
0x25
Erase Flash Page
Write Flash Page
Erase & Write Flash Page
Flash Range CRC
Erase Application Section Page
Write Application Section Page
Erase & Write Application Section Page
Erase Boot Loader Section Page
Write Boot Loader Section Page
Erase & Write Boot Loader Section Page
XMEGA A1
96