PIC16LC67-04I/PT Microchip Technology, PIC16LC67-04I/PT Datasheet - Page 113

• Manufacturer Part Number: PIC16LC67-04I/PT
• Description: IC MCU OTP 8KX14 PWM 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16LC67-04I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 14KB (8K x 14)
• Program Memory Type: OTP
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

Steps to follow when setting up an Asynchronous
Transmission:
1.
2.
3.
4.
FIGURE 12-8: ASYNCHRONOUS MASTER TRANSMISSION
FIGURE 12-9: ASYNCHRONOUS MASTER TRANSMISSION (BACK TO BACK)
TABLE 12-6:
Address
0Ch
18h
19h
8Ch
98h
99h
Legend: x = unknown, - = unimplemented locations read as '0'. Shaded cells are not used for Asynchronous Transmission.
Note 1: PSPIF and PSPIE are reserved on the PIC16C63/R63/66, always maintain these bits clear.
Write to TXREG reg
Write to TXREG reg
1997 Microchip Technology Inc.
RC6/TX/CK (pin)
TXIF bit
(interrupt reg. flag)
RC6/TX/CK (pin)
Initialize the SPBRG register for the appropriate
baud rate. If a high speed baud rate is desired,
then set bit BRGH. (Section 12.1).
Enable the asynchronous serial port by clearing
bit SYNC and setting bit SPEN.
If interrupts are desired, then set enable bit
TXIE.
If 9-bit transmission is desired, then set transmit
bit TX9.
TRMT bit
(Transmit shift
reg. empty flag)
TXIF bit
(Transmit buffer
reg. empty flag)
TRMT bit
(Transmit shift
reg. empty flag)
2: PIR1<6> and PIE1<6> are reserved, always maintain these bits clear.
BRG output
(shift clock)
BRG output
(shift clock)
Name
PIR1
RCSTA
TXREG USART Transmit Register
PIE1
TXSTA
SPBRG Baud Rate Generator Register
REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
PSPIE
PSPIF
Note: This timing diagram shows two consecutive transmissions.
SPEN
CSRC
Bit 7
Transmit Shift Reg.
WORD 1
WORD 1
Transmit Shift Reg
(1)
(1)
Word 1
Word 1
Bit 6
RX9
TX9
(2)
(2)
Start Bit
Start Bit
Word 2
SREN
TXEN
RCIF
RCIE
Bit 5
CREN
SYNC
TXIE
Bit 4
TXIF
Bit 0
Bit 0
SSPIE CCP1IE
SSPIF
Bit 3
—
—
Bit 1
WORD 1
Bit 1
5.
6.
7.
WORD 1
CCP1IF
BRGH
FERR
Bit 2
Enable the transmission by setting bit TXEN,
which will also set bit TXIF.
If 9-bit transmission is selected, the ninth bit
should be loaded in bit TX9D.
Load data to the TXREG register (starts trans-
mission).
TMR2IF
TMR2IE
OERR
TRMT
Bit 1
Bit 7/8
WORD 2
Transmit Shift Reg.
TMR1IF
TMR1IE
RX9D
TX9D
Bit 7/8
Bit 0
Stop Bit
PIC16C6X
Stop Bit
0000 0000
0000 -00x
0000 0000
0000 0000
0000 -010
0000 0000
Value on
POR,
BOR
Start Bit
DS30234D-page 113
WORD 2
0000 0000
0000 -00x
0000 0000
0000 0000
0000 -010
0000 0000
Value on
all other
Resets
Bit 0