PIC16LC67-04I/PT Microchip Technology, PIC16LC67-04I/PT Datasheet - Page 35

IC MCU OTP 8KX14 PWM 44TQFP

PIC16LC67-04I/PT

Manufacturer Part Number
PIC16LC67-04I/PT
Description
IC MCU OTP 8KX14 PWM 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheet

Specifications of PIC16LC67-04I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
14KB (8K x 14)
Program Memory Type
OTP
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16LC67-04I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
4.2.2.1
The STATUS register, shown in Figure 4-9, contains the
arithmetic status of the ALU, the RESET status and the
bank select bits for data memory.
The STATUS register can be the destination for any
instruction, as with any other register. If the STATUS
register is the destination for an instruction that affects
the Z, DC or C bits, then the write to these three bits is
disabled. These bits are set or cleared according to the
device logic. Furthermore, the TO and PD bits are not
writable. Therefore, the result of an instruction with the
STATUS register as destination may be different than
intended.
For example, CLRF STATUS will clear the upper-three
bits and set the Z bit. This leaves the STATUS register
as 000u u1uu (where u = unchanged).
FIGURE 4-9:
Applicable Devices
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
1997 Microchip Technology Inc.
bit7
bit 7:
bit 6-5:
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
R/W-0
IRP
STATUS REGISTER
IRP: RegIster Bank Select bit (used for indirect addressing)
1 = Bank 2, 3 (100h - 1FFh)
0 = Bank 0, 1 (00h - FFh)
RP1:RP0: Register Bank Select bits (used for direct addressing)
11 = Bank 3 (180h - 1FFh)
10 = Bank 2 (100h - 17Fh)
01 = Bank 1 (80h - FFh)
00 = Bank 0 (00h - 7Fh)
Each bank is 128 bytes.
TO: Time-out bit
1 = After power-up, CLRWDT instruction, or SLEEP instruction
0 = A WDT time-out occurred
PD: Power-down bit
1 = After power-up or by the CLRWDT instruction
0 = By execution of the SLEEP instruction
Z: Zero bit
1 = The result of an arithmetic or logic operation is zero
0 = The result of an arithmetic or logic operation is not zero
DC: Digit carry/borrow bit (for ADDWF, ADDLW,SUBLW, and SUBWF instructions) (For borrow the polarity is reversed).
1 = A carry-out from the 4th low order bit of the result occurred
0 = No carry-out from the 4th low order bit of the result
C: Carry/borrow bit (for ADDWF, ADDLW,SUBLW, and SUBWF instructions)( For borrow the polarity is reversed).
1 = A carry-out from the most significant bit of the result occurred
0 = No carry-out from the most significant bit of the result
Note: a subtraction is executed by adding the two’s complement of the second operand.
R/W-0
RP1
For rotate (RRF, RLF) instructions, this bit is loaded with either the high or low order bit of the source register.
STATUS REGISTER (ADDRESS 03h, 83h, 103h, 183h)
R/W-0
RP0
R-1
TO
R-1
PD
R/W-x
Z
It is recommended, therefore, that only BCF, BSF,
SWAPF and MOVWF instructions are used to alter the
STATUS register because these instructions do not
affect the Z, C or DC bits from the STATUS register. For
other instructions, not affecting any status bits, see the
“Instruction Set Summary.”
R/W-x
DC
Note 1: For those devices that do not use bits IRP
Note 2: The C and DC bits operate as a borrow
R/W-x
and RP1 (STATUS<7:6>), maintain these
bits clear to ensure upward compatibility
with future products.
and digit borrow bit, respectively, in sub-
traction. See the SUBLW and SUBWF
instructions for examples.
C
bit0
R = Readable bit
W = Writable bit
- n = Value at POR reset
x = unknown
PIC16C6X
DS30234D-page 35

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