ATSAM3U4EA-CU Atmel, ATSAM3U4EA-CU Datasheet - Page 92
![IC MCU 32BIT 256KB FLSH 144LFBGA](/photos/12/13/121356/144-lfbga_sml.jpg)
ATSAM3U4EA-CU
Manufacturer Part Number
ATSAM3U4EA-CU
Description
IC MCU 32BIT 256KB FLSH 144LFBGA
Manufacturer
Atmel
Series
SAM3Ur
Specifications of ATSAM3U4EA-CU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
96MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
52K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b, 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LFBGA
Processor Series
ATSAM3x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
52 KB
Interface Type
4xUSART, 2xTWI, 5xSPI, Bus
Maximum Clock Frequency
96 MHz
Number Of Programmable I/os
96
Number Of Timers
8
Operating Supply Voltage
1.62 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-CM3, AT91SAM3U-EK, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3U-EK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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92
SAM3U Series
Table 13-13. Cortex-M3 instructions (Continued)
Mnemonic
ISB
IT
LDM
LDMDB,
LDMEA
LDMFD,
LDMIA
LDR
LDRB,
LDRBT
LDRD
LDREX
LDREXB
LDREXH
LDRH,
LDRHT
LDRSB,
LDRSBT
LDRSH,
LDRSHT
LDRT
LSL, LSLS
LSR, LSRS
MLA
MLS
MOV, MOVS
MOVT
MOVW, MOV
MRS
MSR
MUL, MULS
MVN, MVNS
NOP
ORN, ORNS
ORR, ORRS
POP
PUSH
Operands
-
-
Rn{!}, reglist
Rn{!}, reglist
Rn{!}, reglist
Rt, [Rn, #offset]
Rt, [Rn, #offset]
Rt, Rt2, [Rn, #offset]
Rt, [Rn, #offset]
Rt, [Rn]
Rt, [Rn]
Rt, [Rn, #offset]
Rt, [Rn, #offset]
Rt, [Rn, #offset]
Rt, [Rn, #offset]
Rd, Rm, <Rs|#n>
Rd, Rm, <Rs|#n>
Rd, Rn, Rm, Ra
Rd, Rn, Rm, Ra
Rd, Op2
Rd, #imm16
Rd, #imm16
Rd, spec_reg
spec_reg, Rm
{Rd,} Rn, Rm
Rd, Op2
-
{Rd,} Rn, Op2
{Rd,} Rn, Op2
reglist
reglist
Brief description
Instruction Synchronization Barrier
If-Then condition block
Load Multiple registers, increment after -
Load Multiple registers, decrement
before
Load Multiple registers, increment after -
Load Register with word
Load Register with byte
Load Register with two bytes
Load Register Exclusive
Load Register Exclusive with byte
Load Register Exclusive with halfword
Load Register with halfword
Load Register with signed byte
Load Register with signed halfword
Load Register with word
Logical Shift Left
Logical Shift Right
Multiply with Accumulate, 32-bit result
Multiply and Subtract, 32-bit result
Move
Move Top
Move 16-bit constant
Move from special register to general
register
Move from general register to special
register
Multiply, 32-bit result
Move NOT
No Operation
Logical OR NOT
Logical OR
Pop registers from stack
Push registers onto stack
Flags
-
-
-
-
-
-
-
-
-
-
-
-
N,Z,C
N,Z,C
-
-
N,Z,C
-
-
N,Z,C,V
N,Z
N,Z,C
-
N,Z,C
N,Z,C
-
-
-
N,Z,C
6430D–ATARM–25-Mar-11
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