STM8L101F3U6TR STMicroelectronics, STM8L101F3U6TR Datasheet - Page 61

MCU 8BIT 8K FLASH 20UFQFPN

STM8L101F3U6TR

Manufacturer Part Number
STM8L101F3U6TR
Description
MCU 8BIT 8K FLASH 20UFQFPN
Manufacturer
STMicroelectronics
Series
STM8L EnergyLiter
Datasheet

Specifications of STM8L101F3U6TR

Core Processor
STM8
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Infrared, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-UFQFPN
Processor Series
STM8L10x
Core
STM8
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
18
Number Of Timers
3
Operating Supply Voltage
1.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWSTM8
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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0
STM8L101xx
9.3.8
Table 33.
1. Data guaranteed by design, not tested in production.
2. The comparator accuracy depends on the environment. In particular, the following cases may reduce the accuracy of the
V
comparator and must be avoided:
- Negative injection current on the I/Os close to the comparator inputs
- Switching on I/Os close to the comparator inputs
- Negative injection current on not used comparator input.
- Switching with a high dV/dt on not used comparator input.
These phenomena are even more critical when a big external serial resistor is added on the inputs.
IN(COMP_REF)
I
DD(COMP)
t
Symbol
V
propag
t
offset
START
V
IN
(2)
(2)
Figure 36. Typical application with I2C bus and timing diagram
1. Measurement points are done at CMOS levels: 0.3 x V
Comparator characteristics
Comparator characteristics
Comparator external reference
Comparator input voltage range
Comparator offset error
Startup time (after BIAS_EN)
Analog comparator consumption
Analog comparator consumption
during power-down
Comparator propagation delay
SDA
SCL
I
2
t
C BUS
f(SDA)
t
h(STA)
Parameter
START
4.7k
t
w(SCLH)
t
r(SDA)
V
DD
t
w(SCLL)
Doc ID 15275 Rev 11
4.7k
V
DD
t
su(SDA)
t
r(SCL)
input rise time = 1 ns
100
100
with 5-mV overdrive,
100-mV input step
Conditions
t
h(SDA)
t
f(SCL)
DD
SDA
SCL
and 0.7 x V
STM8L
DD
Min
-0.25
-0.1
-
-
-
-
-
(1)
t
su(STA)
Electrical parameters
1)
Typ
t
su(STO)
-
-
-
-
-
-
-
t
w(STO:STA)
STOP
V
V
DD
Max
DD
REPEATED START
25
60
3
2
+0.25
-1.25
20
(1)
(1)
(1)
(1)
(1)
START
61/81
Unit
mV
µA
nA
µs
µs
V
V

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