STM8S105C4T6TR STMicroelectronics, STM8S105C4T6TR Datasheet - Page 7
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STM8S105C4T6TR
Manufacturer Part Number
STM8S105C4T6TR
Description
MCU 16KB FLASH EEPROM 48-LQFP
Manufacturer
STMicroelectronics
Series
STM8Sr
Datasheet
1.STM8S105C4T6.pdf
(127 pages)
Specifications of STM8S105C4T6TR
Core Processor
STM8
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
38
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.95 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Processor Series
STM8S10x
Core
STM8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
38
Number Of Timers
9
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWSTM8
Development Tools By Supplier
STICE-SYS001
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
For Use With
497-10040 - EVAL KIT STM8S DISCOVERY497-10593 - KIT STARTER FOR STM8S207/8 SER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM8S105C4T6TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
STM8S105C4T6TR
Manufacturer:
ST
Quantity:
20 000
STM8S105xx
List of figures
Figure 48. 44-pin low profile quad flat package ...................................................................................106
Figure 49. 32-pin low profile quad flat package (7 x 7) ........................................................................107
Figure 50. 32-lead very thin fine pitch quad flat no-lead package (5 x 5) ............................................111
Figure 51. 32-lead, ultra thin, fine pitch quad flat no-lead package (5 x 5) ..........................................111
Figure 52. 32-lead shrink plastic DIP (400 ml) package ......................................................................112
Figure 53. STM8S105xx access line ordering information scheme .....................................................116
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