ST7FLIT15BM6TR STMicroelectronics, ST7FLIT15BM6TR Datasheet - Page 64
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ST7FLIT15BM6TR
Manufacturer Part Number
ST7FLIT15BM6TR
Description
IC MCU 8BIT 2K FLASH SOIC
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST7FLIT15BY1M6.pdf
(159 pages)
Specifications of ST7FLIT15BM6TR
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
ST7FLIT1x
Core
ST7
Data Bus Width
8 bit
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
For Use With
497-5049 - KIT STARTER RAISONANCE ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Package / Case
-
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST7FLIT15BM6TR
Manufacturer:
ST
Quantity:
20 000
- Current page: 64 of 159
- Download datasheet (3Mb)
ST7LITE1xB
DUAL 12-BIT AUTORELOAD TIMER 4 (Cont’d)
11.2.3.5 Input Capture Mode
The 12-bit ATICR register is used to latch the val-
ue of the 12-bit free running upcounter CNTR1 af-
ter a rising or falling edge is detected on the ATIC
pin. When an input capture occurs, the ICF bit is
set and the ATICR register contains the value of
the free running upcounter. An IC interrupt is gen-
erated if the ICIE bit is set. The ICF bit is reset by
Figure 43. Block Diagram of Input Capture Mode
Figure 44. Input Capture timing diagram
64/159
1
ATIC
COUNTER1
ICF FLAG
f
ATIC PIN
COUNTER
@ 8 MHz)
f
(1 ms
LTIMER
timebase
32 MHz
f
OFF
CPU
01h
ATCSR
ATICR
02h
xxh
ICF
CNTR1
12-BIT INPUT CAPTURE REGISTER
ATR1
03h
ICIE
12-BIT AUTORELOAD REGISTER
04h
IC INTERRUPT
CK1
12-BIT UPCOUNTER1
REQUEST
05h
CK0
INTERRUPT
reading the ATICRH/ATICRL register when the
ICF bit is set. The ATICR is a read only register
and always contains the free running upcounter
value which corresponds to the most recent input
capture. Any further input capture is inhibited while
the ICF bit is set.
06h
07h
04h
08h
ATICR READ
09h
0Ah
09h
INTERRUPT
t
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