ST72F63BH2T1 STMicroelectronics, ST72F63BH2T1 Datasheet - Page 50

• Manufacturer Part Number: ST72F63BH2T1
• Description: IC MCU 8BIT 8K FLASH 48-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F63BH2T1

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SCI, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 27
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 48-LQFP
• Processor Series: ST72F6x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: I2C, SCI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 27
• Number Of Timers: 1
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7MDTU3-EPB/US, ST7MDTULS-EVAL, ST72F63B-SK/RAIS, ST7MDTU3-EMU3, STX-RLINK
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit, 8 Channel / 8 bit, 12 Channel
• For Use With: 497-5521 - EVAL BOARD LOW SPEED USB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

I/O ports
9.3.4
Table 15.
1. Reset state
9.3.5
Note:
Note:
50/186
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
Port D
Port D
Port D description
Register description
DATA registers (PxDR)
Address
Reset value
For Port C, unused bits (7-3) are not accessible.
The DR register has a specific behavior according to the selected input/output configuration.
Writing the DR register is always taken into account even if the pin is configured as an input.
Reading the DR register returns either the DR register latch content (pin configured as
output) or the digital value applied to the I/O pin (pin configured as input).
When using open-drain I/Os in output configuration, the value read in DR is the digital value
applied to the I/Opin.
without pull-up
without pull-up
without pull-up
without pull-up
with pull-up
with pull-up
with pull-up
with pull-up
Port A Data register (PADR): 0000h
Port B Data register (PBDR): 0002h
Port C Data register (PCDR): 0004h
Port D Data register (PDDR): 0006h
Port A: 0000 0000 (00h)
Port B: 0000 0000 (00h)
Port C: 1111 x000 (FXh)
Port D: 0000 0000 (00h)
Input
(1)
push-pull
push-pull
push-pull
push-pull
push-pull
push-pull
push-pull
push-pull
I / O
Output
Doc ID 7516 Rev 8
Analog input (ADC)
Analog input (ADC)
Analog input (ADC)
Analog input (ADC)
Signal
Alternate function
CH[3:0] = 1000
(ADCCSR)
CH[3:0] = 1001
(ADCCSR)
CH[3:0] = 1010
(ADCCSR)
CH[3:0] = 1011
(ADCCSR)
Condition
ST7263Bxx