ST7FMC1K4T6 STMicroelectronics, ST7FMC1K4T6 Datasheet - Page 222

• Manufacturer Part Number: ST7FMC1K4T6
• Description: MCU 8BIT 16K FLASH 32TQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FMC1K4T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: LINSCI
• Peripherals: LVD, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 3.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: ST7FMC1x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 3
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7MC-KIT/BLDC, ST7MDT50-EMU3, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• For Use With: 497-8402 - BOARD EVAL COMPLETE INVERTER497-8400 - KIT IGBT PWR MODULE CTRL ST7MC497-4734 - EVAL KIT 3KW POWER DRIVER BOARD497-4733 - EVAL KIT 1KW POWER DRIVER BOARD497-4732 - EVAL KIT 300W POWER DRIVER BOARD497-4731 - EVAL KIT PWR DRIVER CONTROL BRD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-4866

ST7MC1xx/ST7MC2xx
MOTOR CONTROLLER (Cont’d)
POLARITY REGISTER (MPOL)
Read/Write (some bits write-once)
Reset Value: 0011 1111 (3Fh)
Bit 7 = ZVD: Z vs D edge polarity.
0: Zero-crossing and End of Demagnetisation
1: Zero-crossing and End of Demagnetisation
Bit 6 = REO: Read on High or
0: Read the BEMF signal on High channels
1: Read on
Note: This bit always has to be configured whatev-
er the sampling method.
Bits 5:0 = OP[5:0]*: Output channel polarity.
These bits are used together with the OO
in the MPHST register to control the output chan-
nels.
0: Output channel is Active Low
1: Output channel is Active High.
* Write-once bits; once write-accessed these bits
cannot be re-written unless the processor is reset
(See “Caution: Access to write-once bits” on
page 220.).
Table 75. Output Channel State Control
Warning: OP[5:0] bits in the MPOL register must
be configured as required by the application be-
fore enabling the MCO[5:0] outputs with the MOE
bit in the MCRA register.
222/309
OP[5:0] bit
ZVD
have opposite edges
have same edge
7
0
0
1
1
REO
6
Low
OP5
5
OO[5:0] bit
channels
0
1
0
1
OP4
4
OP3
3
Low
0 (PWM possible)
1 (PWM possible)
OP2
2
MCO[5:0] pin
channel bit
1 (Off)
0 (Off)
OP1
1
[5:0]
OP0
0
bits