ST62T60CB6 STMicroelectronics, ST62T60CB6 Datasheet - Page 60

• Manufacturer Part Number: ST62T60CB6
• Description: IC MCU 8BIT W/ADC 20-PDIP
• Manufacturer: STMicroelectronics
• Series: ST6r

Specifications of ST62T60CB6

• Core Processor: ST6
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI
• Peripherals: LED, LVD, POR, WDT
• Number Of I /o: 13
• Program Memory Size: 3.8KB (3.8K x 8)
• Program Memory Type: OTP
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 6 V
• Data Converters: A/D 7x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Processor Series: ST62T6x
• Core: ST6
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 2
• Operating Supply Voltage: 3 V to 6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: ST622XC-KIT/110, ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 7-ch x 8-bit
• Controller Family/series: ST6
• No. Of I/o's: 13
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 128Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

INSTRUCTION SET (Cont’d)
Arithmetic and Logic. These instructions are
used to perform the arithmetic calculations and
logic operations. In AND, ADD, CP, SUB instruc-
tions one operand is always the accumulator while
the other can be either a data space memory con-
Table 18. Arithmetic & Logic Instructions
Notes:
X,Y.Indirect Register Pointers, V & W Short Direct RegistersD. Affected
# . Immediate data (stored in ROM memory)* . Not Affected
rr. Data space register
ADD A, (X)
ADD A, (Y)
ADD A, rr
ADDI A, #N
AND A, (X)
AND A, (Y)
AND A, rr
ANDI A, #N
CLR A
CLR r
COM A
CP A, (X)
CP A, (Y)
CP A, rr
CPI A, #N
DEC X
DEC Y
DEC V
DEC W
DEC A
DEC rr
DEC (X)
DEC (Y)
INC X
INC Y
INC V
INC W
INC A
INC rr
INC (X)
INC (Y)
RLC A
SLA A
SUB A, (X)
SUB A, (Y)
SUB A, rr
SUBI A, #N
Instruction
Indirect
Indirect
Direct
Immediate
Indirect
Indirect
Direct
Immediate
Short Direct
Direct
Inherent
Indirect
Indirect
Direct
Immediate
Short Direct
Short Direct
Short Direct
Short Direct
Direct
Direct
Indirect
Indirect
Short Direct
Short Direct
Short Direct
Short Direct
Direct
Direct
Indirect
Indirect
Inherent
Inherent
Indirect
Indirect
Direct
Immediate
Addressing Mode
ST6253C ST6263C ST6263B ST6260C ST6260B
Bytes
1
1
2
2
1
1
2
2
2
3
1
1
1
2
2
1
1
1
1
2
2
1
1
1
1
1
1
2
2
1
1
1
2
1
1
2
2
tent or an immediate value in relation with the ad-
dressing mode. In CLR, DEC, INC instructions the
operand can be any of the 256 data space ad-
dresses. In COM, RLC, SLA the operand is always
the accumulator.
Cycles
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
Z
*
Flags
C
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
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