STR911FAW44X6T STMicroelectronics, STR911FAW44X6T Datasheet - Page 90

• Manufacturer Part Number: STR911FAW44X6T
• Description: MCU 16/32BIT FLASH 128-TQFP
• Manufacturer: STMicroelectronics
• Series: STR9r

Specifications of STR911FAW44X6T

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 96MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 2 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-LQFP
• Processor Series: STR911x
• Core: ARM966E-S
• 3rd Party Development Tools: EWARM, EWARM-BL, MCBSTR9, MCBSTR9U, MCBSTR9UME, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: STR9-COMSTICK, STR910-EVAL, STR91X-SK/HIT, STR91X-SK/IAR, STR91X-SK/KEI, STR91X-SK/RAI, STR9-DK/RAIS, STR91X-DK/IAR, STX-PRO/RAIS, STR912-D/RAIS, STR79-RVDK/CPP, STR79-RVDKCPP/9, STR79-RVDK, STR79-RVDK/9, STR9-RVDK/BAS, STR79-RVDK/UPG
• For Use With: 497-5067 - BOARD EVAL FOR STR910 FAMILY497-5066 - KIT STARTER KEIL FOR STR910497-5065 - KIT STARTER IAR KICKSTART STR912497-5064 - KIT STARTER FOR STR910 FAMILY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Electrical characteristics
7.13
Table 47.
1. Guaranteed by design, not tested in production.
2. The ADC clock can be disabled by setting the ADC bit in the SCU_PCGR1 register or by setting the ACG bit in the
3. Conditions: AV
4. The A/D is monotonic, there are no missing codes.
5. 1 LSB = (AV
6. Data based on characterization, not tested in production.
7. Conditions: V
90/102
V
RES
N
f
t
t
t
C
E
E
E
E
E
I
I
ADC
POR(ADC)
ck_off(ADC)
STAB
ADC
VREF
Symbol
AIN
D
L
O
G
T
CH
IN
SCU_GPIOANA register (for Rev H and higher)
Input voltage range
Resolution
Number of input channels
ADC clock frequency
POR bit set to Standby mode
ADC clock disabled before conversion
Stabilization time
Input capacitance
Differential non-linearity
Integral non-linearity
Offset error
Gain error
Total unadjusted error
Power consumption
Current on VREF input pin
ADC electrical characteristics
V
General ADC electrical characteristics
DD
DD
DDQ
SS
- AV
=1.8 V, f
= 0 V, AV
= 2.7 - 3.6 V, V
SS
)/1024
CPU
Parameter
DD
=96 MHz , f
= 3.3 V f
DD
(1)
ADC
ADC
= 1.65 - 2 V, T
= 25 MHz.
=24 MHz
Doc ID 13495 Rev 6
(2)
conditions
A
= -40 / 85 °C unless otherwise specified.
(3) (4)
(6) (7)
Test
(3)
(3)
(3)
(3)
Min
0
Value
Typ
0.5
4.6
5
1
3
3
4
AV
Max
500
920
10
25
15
STR91xFAxxx
8
1
3
6
6
2
6
REF
LSB
LSB
LSB
LSB
LSB
MHz
Unit
Bits
mA
ms
ms
µA
pF
µs
V
N
(5)
(5)
(5)
(5)
(5)