LH79520N0M000B1 Sharp Microelectronics, LH79520N0M000B1 Datasheet

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Preliminary Data Sheet FEATURES • Highly Integrated System-on-Chip • High Performance (77.4144 MHz CPU Speed) • ARM720T™ RISC Core – 32-bit ARM7TDMI™ RISC Core – 8KB Cache – MMU (Windows CE™ Enabled) – Write Buffer • 32KB On-Chip SRAM • ...

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LH79520 PIN DIAGRAM 176-PIN LQFP PC3/LCDDCLK 133 PC2/LCDDCLKIN 134 PC1/LCDVDDEN/LCDCLS 135 VDDC 136 PC0/LCDENAB/LCDSPL 137 VSSC 138 PB7/LCDVD15/LCDDSPLEN 139 PB6/LCDVD14 140 PB5/LCDVD13 141 PB4/LCDVD12/LCDREV 142 VDD 143 INT5/DREQ1/nWAIT 144 CTOUT1B/DACK1 145 PB3/DREQ0 146 PB2/nDACK0 147 PB1/DEOT0 148 VSS 149 INT4/PWM0 ...

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System-on-Chip DEBUG/TEST INTERFACE RESET TEST LOGIC / PIN ARM 720T MUXING CONTROLLER EXTERNAL BUS INTERFACE CONTROLLER Preliminary Data Sheet EXTERNAL 14.7456 MHz 32.768 kHz INTERRUPTS OSCILLATOR, PLL POWER MANAGEMENT, and RESET CONTROL 32KB SRAM CONDITIONED EXTERNAL INTERRUPTS VECTORED INTERRUPT CONTROLLER ...

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LH79520 SIGNAL DESCRIPTIONS PIN NO. SIGNAL NAME TYPE 2-7 9-12 14-17 A[25:0] Output 19-22 24-27 29-32 50-54 56-63 65-66 67-69 D[31:0] Input/Output 71-74 76-79 81-84 86-87 101 SDCLK Output 109 DQM3 Output 110 DQM2 Output 111 DQM1 Output 112 DQM0 ...

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System-on-Chip Table 1. LH79520 Signal Descriptions (Cont’d) PIN NO. SIGNAL NAME TYPE 130 132 139 140 141 142 114 115 116 LCDVD[17:0] Output 117 118 119 121 122 123 124 126 127 137 LCDENAB Output 129 LCDFP Output 131 LCDLP ...

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LH79520 Table 1. LH79520 Signal Descriptions (Cont’d) PIN NO. SIGNAL NAME TYPE 160 UARTRX1 Input 159 UARTTX1 Output 169 UARTRX2 Input 167 UARTTX2 Output 153 PA7 155 PA6 156 PA5 159 PA4 Input/Output 160 PA3 164 PA2 165 PA1 166 ...

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System-on-Chip Table 1. LH79520 Signal Descriptions (Cont’d) PIN NO. SIGNAL NAME TYPE 52 PG7 53 PG6 54 PG5 56 PG4 Input/Output 57 PG3 58 PG2 PG1 59 60 PG0 34 PH7 35 PH6 41 PH5 42 PH4 Input/Output 43 PH3 ...

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LH79520 Table 1. LH79520 Signal Descriptions (Cont’d) PIN NO. SIGNAL NAME TYPE VDDC Power 113 136 154 45 120 VSSC Ground 138 158 VDD Power 85 100 125 143 161 13 23 ...

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System-on-Chip NUMERCIAL PIN LIST Table 2. LH79520 Numerical Pin List FUNCTION AT PIN NO. FUNCTION 2 FUNCTION 3 RESET 1 nTSTA 2 A25 3 A24 4 A23 5 A22 6 A21 7 A20 8 VDD 9 A19 10 A18 11 ...

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LH79520 Table 2. LH79520 Numerical Pin List (Cont’d) FUNCTION AT PIN NO. FUNCTION 2 FUNCTION 3 RESET 39 nWE 40 VDDC 41 PH5 nCS6 42 PH4 nCS5 43 PH3 nCS4 44 PH2 nCS3 45 VSSC 46 nCS2 47 nCS1 48 ...

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System-on-Chip Table 2. LH79520 Numerical Pin List (Cont’d) FUNCTION AT PIN NO. FUNCTION 2 FUNCTION 3 RESET VSS VDD CLKINSEL 89 ...

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LH79520 Table 2. LH79520 Numerical Pin List (Cont’d) FUNCTION AT PIN NO. FUNCTION 2 FUNCTION 3 RESET 117 PD6 LCDVD8 118 PD5 LCDVD7 119 PD4 LCDVD6 120 VSSC 121 PD3 LCDVD5 122 PD2 LCDVD4 123 PD1 LCDVD3 124 PD0 LCDVD2 ...

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System-on-Chip Table 2. LH79520 Numerical Pin List (Cont’d) FUNCTION AT PIN NO. FUNCTION 2 FUNCTION 3 RESET 156 PA5 CLKOUT 157 PWM1 DEOT1 158 VSSC 159 PA4 UARTTX1 160 PA3 UARTRX1 161 VDD 162 UARTIRTX0 UARTTX0 163 UARTIRRX0 UARTRX0 164 ...

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LH79520 PIN LCD DATA MONO 4-BIT NO. SIGNAL SINGLE DUAL PANEL PANEL 130 LCDVD17 132 LCDVD16 139 LCDVD15 140 LCDVD14 141 LCDVD13 142 LCDVD12 114 LCDVD11 MLSTN3 115 LCDVD10 MLSTN2 116 LCDVD9 MLSTN1 117 LCDVD8 MLSTN0 118 LCDVD7 119 LCDVD6 ...

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System-on-Chip IMAGER MEMORY CARD INTERFACE Figure 3. LH79520 Application Diagram Example SYSTEM DESCRIPTIONS ARM720T Processor The LH79520 microcontroller features the ARM720T cached core with an Advanced High-Performance Bus (AHB) interface. The ARM720T features: • 32-bit ARM7TDMI™ RISC Core • 8KB ...

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LH79520 Memory Architecture An integrated SDRAM Controller and Static Memory Controller provide a glueless interface to external SDRAM, Flash, SRAM, ROM, and burst ROM. Three remap options for the physical memory are selectable by software, as shown in Figures 4, ...

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System-on-Chip • Simultaneous servicing data streams • Three transfer modes are supported: – Memory to Memory – Peripheral to Memory – Memory to Peripheral • Identical source and destination capabilities • Transfer Size Programmable (Byte, Half-word, ...

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LH79520 VARIATIONS FROM THE 16C550 UART The UART varies from the industry-standard 16C550 UART device in six ways: • Receive FIFO trigger levels are fixed at 8 bytes • Receive errors are stored in the FIFO, and do not generate ...

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System-on-Chip Reset, Clock, and Power Controller (RCPC) The RCPC generates the various clock signals for the operation of the LH79520 and provides for an orderly start-up after power-on and during a wake-up from one of the power saving operating modes. ...

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LH79520 Real Time Clock The RTC can provide a basic alarm function or long time base counter. This is achieved by generating an interrupt signal after counting for a programmed num- ber of cycles of RTC input. Counting in one-second ...

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System-on-Chip ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings PARAMETER DC Core Supply Voltage DC I/O Supply Voltage DC Analog Supply Voltage Storage Temperature NOTE: These stress ratings are only for transient conditions. Oper- ation at or beyond absolute maximum rating conditions may ...

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LH79520 DC/AC SPECIFICATIONS (COMMERCIAL) Unless otherwise noted, all data provided under commercial DC specifications are based on 0°C to +70°C, VDDC = 1. 1.98 V, VDD = 3 3.6 V, VDDA = 1. 1.98 ...

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System-on-Chip AC Specifications All signals described in Table 6 relate to transitions after a reference clock signal. The illustration in Figure 7 represents all cases of these sets of measurement parameters; except for the Asynchronous Memory Interface — which are ...

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LH79520 Table 6. AC Signal Characteristics (Commercial) SIGNAL TYPE LOAD DRIVE ASYNCHRONOUS MEMORY INTERFACE SIGNALS Output D[31:0] Input nCS6 - nCS0 Output nBLE[3:0] Output nWE Output 30 pF ...

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System-on-Chip Table 6. AC Signal Characteristics (Commercial) (Cont’d) SIGNAL TYPE LOAD DRIVE SSPFRM Output SSPENB Output SSPTX Output SSPRX Input INTR[5:0] Input NOTES: 1. INTR[5:0] are asynchronous signals. ...

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LH79520 DC/AC SPECIFICATIONS (INDUSTRIAL) Unless otherwise noted, all data provided under industrial DC specifications are based on -40°C to +85°C, VDDC = 1. 1.98 V, VDD = 3 3.6 V, VDDA = 1. 1.98 ...

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System-on-Chip AC Specifications (Industrial) Table 7. AC Signal Characteristics (Industrial) SIGNAL TYPE LOAD DRIVE ASYNCHRONOUS MEMORY INTERFACE SIGNALS Output D[31:0] Input nCS6 - nCS0 Output nBLE[3:0] Output nWE ...

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LH79520 Table 7. AC Signal Characteristics (Cont’d)(Industrial) SIGNAL TYPE LOAD DRIVE SSPFRM Output SSPENB Output SSPTX Output SSPRX Input INTR[5:0] Input NOTES: 1. INTR[5:0] are asynchronous signals. Interrupts ...

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System-on-Chip EXTERNAL CLOCKS Table 8. External Clocks AC Specifications SYMBOL DESCRIPTION tCLKIN CLKIN Period tCLKINH CLKIN HIGH Time tCLKINL CLKIN LOW TIme tSSPCLK SSPCLK Period tSSPCLKH SSPCLK HIGH Time tSSPCLKL SSPCLK LOW Time tUCLK UCLK tUCLKH UCLK HIGH Time tUCLKL ...

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LH79520 Static Memory Controller Waveforms nWAIT INPUT The Static Memory Controller (SMC) supports an nWAIT input that can be used by an external device to extend the wait time during a memory access. The SMC samples nWAIT at the beginning ...

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System-on-Chip Preliminary Data Sheet Figure 11. nWait Assertion 9/10/03 LH79520 31 ...

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LH79520 Figure 12. External Static Memory Write, One Wait State 32 9/10/03 System-on-Chip Preliminary Data Sheet ...

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System-on-Chip Figure 13. External Static Memory Read, One Wait State Preliminary Data Sheet 9/10/03 LH79520 33 ...

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LH79520 Figure 14. External Static Memory Write, Two Wait States 34 9/10/03 System-on-Chip Preliminary Data Sheet ...

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System-on-Chip Figure 15. Synchronous Serial Port Waveform Preliminary Data Sheet 9/10/03 LH79520 35 ...

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LH79520 SDRAM Memory Controller Waveforms Figure 16 shows the waveform and timing for an SDRAM Burst Read (page already open). Figure 17 shows the waveform and timing for SDRAM to Activate a Bank and Write. t SDCLK SCLK SDRAMcmd A[15:0] ...

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System-on-Chip External DMA Handshake Signal Timing DREQ TIMING Once asserted, DREQ0 or DREQ1 must not transi- tion from LOW to HIGH again until after DACK0 or nDACK1 has been asserted. DACK/DEOT TIMING These timing diagrams indicate when DACK0, nDACK1, DEOT0 ...

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LH79520 HCLK (See Note) A[23:0] D[31:0] nCSx nWEN nBLE[1:0] nOE DACK0/ DEOT0/DEOT1 nDACK1 NOTE: * HCLK is an internal signal provided for reference only. Figure 19. Read, from Peripheral to Memory, Burst Size = 1 HCLK (See Note) A[23:0] D[15:0] ...

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System-on-Chip * HCLK ADDRESS A[23:0] D[31:0] nCSx nWEN nBLE[1:0] nOE DACK0/DEOT0/DEOT1 nDACK1 NOTE: * HCLK is an internal signal, provided for reference only. Figure 21. Read, Peripheral to Memory: Peripheral Burst Size = 4 Preliminary Data Sheet DATA #1 DATA ...

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LH79520 Figure 22. Write, memory to Pheripheral: Burst Size = 4; Destination Width > External Access Width 40 9/10/03 System-on-Chip Preliminary Data Sheet ...

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System-on-Chip Reset, Clock, and Power Controller (RCPC) Waveforms Figure 23 shows the method the LH79520 uses when coming out of Reset or Power On. Figure 24 shows external reset timing, and Table 9 gives the timing parameters. PARAMETER tOSC32 Oscillator ...

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LH79520 Printed Circuit Board Layout Practices LH79520 POWER SUPPLY DECOUPLING The LH79520 has separate power and ground pins for different internal circuitry sections. The VDD and VSS pins supply power to I/O buffers, while VDDC and VSSC supply power to ...

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System-on-Chip SUGGESTED EXTERNAL COMPONENTS Figure 26 shows the suggested external compo- nents for the 32.768 kHz crystal circuit to be used with INTERNAL TO THE LH79520 EXTERNAL TO THE LH79520 NOTES parallel-resonant type crystal. (See table) ...

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LH79520 Figure 27 shows the suggested external components for the 14.7456 MHz crystal circuit to be used with the INTERNAL TO THE LH79520 EXTERNAL TO THE LH79520 NOTES parallel-resonant type crystal. (See table) 2. The nominal ...

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System-on-Chip PACKAGE SPECIFICATIONS 176LQFP (JEDEC MS-026) 22.0 (TYP.) 20.0 (TYP.) NOTES: 1. Dimensions in mm. 2. Refer to JEDEC MS-026 for tolerances. Preliminary Data Sheet 1.00 REF. 1.00 REF. 20.0 (TYP.) DETAIL Figure 28. 176-pin LQFP 9/10/03 LH79520 0.10 22.0 ...

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LH79520 NOTE: Dimensions in mm. 46 21.25 0.4 17.2 Figure 29. Recommended PCB Footprint 9/10/03 System-on-Chip 1.67 79520-155 Preliminary Data Sheet ...

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System-on-Chip CONTENT REVISIONS This document contains the following changes to content, causing it to differ from previous versions. PAGE PARAGRAPH OR DATE NO. ILLUSTRATION 1 Features DC Specifications 22 (Commercial) 8-16-2002 24 Table 6 31 Table 9 34 Figure 23 ...

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