ST10F269-DPR STMicroelectronics, ST10F269-DPR Datasheet - Page 105

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ST10F269-DPR

Manufacturer Part Number
ST10F269-DPR
Description
MCU 16BIT 256K FLASH 144PQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F269-DPR

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
144-BFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Manufacturer
Quantity
Price
Part Number:
ST10F269-DPR
Manufacturer:
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Quantity:
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0
17 - WATCHDOG TIMER
The Watchdog Timer is a fail-safe mechanism which prevents the microcontroller from malfunctioning for
long periods of time.
The Watchdog Timer is always enabled after a reset of the chip and can only be disabled in the time
interval until the EINIT (end of initialization) instruction has been executed.
Therefore, the chip start-up procedure is always monitored. The software must be designed to service the
watchdog timer before it overflows. If, due to hardware or software related failures, the software fails to do
so, the watchdog timer overflows and generates an internal hardware reset. It pulls the RSTOUT pin low
in order to allow external hardware components to be reset.
Each of the different reset sources is indicated in the WDTCON register.
The indicated bits are cleared with the EINIT instruction. The origine of the reset can be identified during
the initialization phase.
WDTCON (FFAEh / D7h)
Notes: 1. More than one reset indication flag may be set. After EINIT, all flags are cleared.
WDTIN
WDTR
SWR
SHWR
LHWR
PONR
15
1-3
2. Power-on is detected when a rising edge from V
3. These bits cannot be directly modified by software.
1- 2-3
1-3
1-3
1-3
14
13
Watchdog Timer Input Frequency Selection
‘0’: Input Frequency is f
‘1’: Input Frequency is f
Watchdog Timer Reset Indication Flag
Set by the watchdog timer on an overflow.
Cleared by a hardware reset or by the SRVWDT instruction.
Software Reset Indication Flag
Set by the SRST execution.
Cleared by the EINIT instruction.
Short Hardware Reset Indication Flag
Set by the input RSTIN.
Cleared by the EINIT instruction.
Long Hardware Reset Indication Flag
Set by the input RSTIN.
Cleared by the EINIT instruction.
Power-On (Asynchronous) Reset Indication Flag
Set by the input RSTIN if a power-on condition has been detected.
Cleared by the EINIT instruction.
WDTREL
12
RW
11
10
9
CPU
CPU
8
/2.
/128.
DD
= 0 V to V
7
-
SFR
DD
6
-
> 2.0 V is recognized on the internal 3.3V supply.
PONR LHWR SHWR
HR
5
HR
4
HR
3
SWR
HR
Reset Value: 00xxh
2
WDTR WDTIN
HR
1
ST10F269
105/160
RW
0

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