M38503G4AFP#U1 Renesas Electronics America, M38503G4AFP#U1 Datasheet - Page 49

• Manufacturer Part Number: M38503G4AFP#U1
• Description: IC 740/3850 MCU QZ-ROM 42SSOP
• Manufacturer: Renesas Electronics America
• Series: 740/38000r

Specifications of M38503G4AFP#U1

• Core Processor: 740
• Core Size: 8-Bit
• Speed: 12.5MHz
• Connectivity: SIO, UART/USART
• Peripherals: PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: QzROM
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 42-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

3850 Group (Spec.A QzROM version)
Rev.2.13
REJ03B0125-0213
Timing Requirements
Table 16 Timing requirements (1) (V
NOTES:
Table 17 Timing requirements (2) (V
NOTES:
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
W
C
WH
WL
C
WH
WL
WH
WL
C
WH
WL
su
h
C
WH
WL
su
h
W
C
WH
WL
C
WH
WL
WH
WL
C
WH
WL
su
h
C
WH
WL
su
h
1. When f(X
1. When f(X
(S
(S
(S
(S
(X
(CNTR)
(S
(S
(X
(CNTR)
(S
(S
(RESET)
(RESET)
(R
(S
(R
(S
(X
(CNTR)
(INT)
(S
(S
(X
(CNTR)
(INT)
(S
(S
(X
(CNTR)
(INT)
(S
(S
(X
(CNTR)
(INT)
(S
(S
Symbol
CLK1
CLK2
Symbol
CLK1
CLK2
IN
CLK1
CLK2
IN
CLK1
CLK2
x
IN2
Divide this value by four when f(X
x
IN2
Divide this value by four when f(X
IN
CLK1
CLK2
IN
CLK1
CLK2
D-S
D-S
IN
CLK1
CLK2
IN
CLK1
CLK2
)
)
)
)
)
-S
)
-S
-R
-S
-R
-S
)
)
)
)
CLK1
CLK1
)
)
CLK2
)
)
CLK2
)
)
)
)
IN2
IN2
x
x
D)
D)
)
)
Apr 17, 2009
) Serial I/O1 input setup time
) Serial I/O1 input setup time
) Serial I/O2 clock input setup time
) Serial I/O2 clock input setup time
IN
IN
) = 8 MHz and bit 6 of address 001A
) = 4 MHz and bit 6 of address 001A
Reset input “L” pulse width
External clock input cycle time
External clock input “H” pulse width
External clock input “L” pulse width
CNTR
CNTR
CNTR
INT
INT
Serial I/O1 clock input cycle time
Serial I/O1 clock input “H” pulse width
Serial I/O1 clock input “L” pulse width
Serial I/O1 input hold time
Serial I/O2 clock input cycle time
Serial I/O2 clock input “H” pulse width
Serial I/O2 clock input “L” pulse width
Serial I/O2 clock input hold time
Reset input “L” pulse width
External clock input cycle time
External clock input “H” pulse width
External clock input “L” pulse width
CNTR
CNTR
CNTR
INT
INT
Serial I/O1 clock input cycle time
Serial I/O1 clock input “H” pulse width
Serial I/O1 clock input “L” pulse width
Serial I/O1 input hold time
Serial I/O2 clock input cycle time
Serial I/O2 clock input “H” pulse width
Serial I/O2 clock input “L” pulse width
Serial I/O2 clock input hold time
0
0
0
0
to INT
to INT
to INT
to INT
0
0
0
0
0
0
, CNTR
, CNTR
, CNTR
, CNTR
, CNTR
, CNTR
3
3
3
3
input “H” pulse width
input “L” pulse width
input “H” pulse width
input “L” pulse width
1
1
1
1
1
1
input cycle time
input “H” pulse width
input “L” pulse width
input cycle time
input “H” pulse width
input “L” pulse width
Page 47 of 56
IN
IN
) = 8 MHz and bit 6 of address 001A
) = 4 MHz and bit 6 of address 001A
CC
CC
Parameter
Parameter
= 4.0 to 5.5 V, V
= 2.7 to 5.5 V, V
(1)
(1)
16
16
(1)
(1)
(1)
(1)
is “1” (clock synchronous).
is “1” (clock synchronous).
SS
SS
= 0 V, Ta = − 20 to 85 °C, unless otherwise noted)
= 0 V, Ta = − 20 to 85 °C, unless otherwise noted)
16
16
is “0” (UART).
is “0” (UART).
1000
2000
2000
Min.
Min.
200
800
370
370
220
100
400
400
200
200
166
500
230
230
230
230
950
950
400
200
950
950
400
300
20
80
32
32
80
80
80
80
20
66
66
Limits
Limits
Typ.
Typ.
Max.
Max.
X
X
IN
IN
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
cycle
cycle