MCHC908GR8AMFAER Freescale Semiconductor, MCHC908GR8AMFAER Datasheet - Page 243

• Manufacturer Part Number: MCHC908GR8AMFAER
• Description: IC MCU 8K FLASH 8MHZ 32-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908GR8AMFAER

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 7.5KB (7.5K x 8)
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 32-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 21
• Ram Memory Size: 384Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08G
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8.2 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

19.3 Monitor Module (MON)
The monitor module allows debugging and programming of the microcontroller unit (MCU) through a
single-wire interface with a host computer. Monitor mode entry can be achieved without use of the higher
test voltage, V
requirements for in-circuit programming.
Features of the monitor module include:
19.3.1 Functional Description
Figure 19-9
The monitor ROM receives and executes commands from a host computer.
and
computer via a standard RS-232 interface.
Simple monitor commands can access any memory address. In monitor mode, the MCU can execute
code downloaded into RAM by a host computer while most MCU pins retain normal operating mode
functions. All communication between the host computer and the MCU is through the PTA0 pin. A
level-shifting and multiplexing interface is required between PTA0 and the host computer. PTA0 is used
in a wired-OR configuration and requires a pullup resistor.
The monitor code has been updated from previous versions of the monitor code to allow the ICG to
generate the internal clock. This option, which is selected when IRQ is held low out of reset, is intended
to support serial communication/ programming at 9600 baud in monitor mode by using the ICG, and the
ICG user trim value ICGTR5 (if programmed) to generate the desired internal frequency (2.4576 MHz). If
ICGTR5 is not programmed (i.e., the value is $FF) then the ICG will operate at a nominal (untrimmed)
2.45 MHz and communications will be nominally at 9600 baud but the untrimmed rate may cause
difficulties with hosts which cannot automatically adjust their data rates to match.
Since this feature is enabled only when IRQ is held low out of reset, it cannot be used when the reset
vector is programmed (i.e., the value is not $FFFF) because entry into monitor mode in this case requires
V
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or copying the Flash difficult for
Freescale Semiconductor
TST
unauthorized users.
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Figure 19-12
on IRQ.
Normal user-mode pin functionality
One pin dedicated to serial communication between monitor read-only memory (ROM) and host
computer
Standard mark/space non-return-to-zero (NRZ) communication with host computer
Execution of code in random-access memory (RAM) or Flash
Flash memory security feature
Flash memory programming interface
External 4.92 MHz or 9.83 MHz clock used to generate internal frequency of 2.4576 MHz
Optional ICG mode of operation (no external clock or high voltage)
Monitor mode entry without high voltage, V
$FF)
Normal monitor mode entry if high voltage is applied to IRQ
shows a simplified monitor mode entry flowchart.
TST
, as long as vector addresses $FFFE and $FFFF are blank, thus reducing the hardware
show example circuits used to enter monitor mode and communicate with a host
MC68HC908GT16 • MC68HC908GT8 • MC68HC08GT16 Data Sheet, Rev. 5.0
(1)
TST
, if reset vector is blank ($FFFE and $FFFF contain
Figure 19-10, Figure
Monitor Module (MON)
19-11,
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