C8051F367-GM Silicon Laboratories Inc, C8051F367-GM Datasheet - Page 103
![IC 8051 MCU 32K FLASH 28-QFN](/photos/12/36/123607/c8051f367-gm_sml.jpg)
C8051F367-GM
Manufacturer Part Number
C8051F367-GM
Description
IC 8051 MCU 32K FLASH 28-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F36xr
Specifications of C8051F367-GM
Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
28-QFN
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 17x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C/SMBus/SPI/UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F360DK
Minimum Operating Temperature
- 40 C
On-chip Adc
21-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
28QFN EP
Device Core
8051
Family Name
C8051F36x
Maximum Speed
50 MHz
Operating Supply Voltage
3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1410 - KIT DEV FOR C8051F360 FAMILY
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1649
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F367-GM
Manufacturer:
Silicon Labs
Quantity:
135
- Current page: 103 of 288
- Download datasheet (3Mb)
Bit 7:
Bit 6:
Bit 5:
Bits 4–3: RS1–RS0: Register Bank Select.
Bit 2:
Bit 1:
Bit 0:
SFR Page:
SFR Address:
R/W
CY
Bit7
CY: Carry Flag.
This bit is set when the last arithmetic operation resulted in a carry (addition) or a borrow
(subtraction). It is cleared to 0 by all other arithmetic operations.
AC: Auxiliary Carry Flag
This bit is set when the last arithmetic operation resulted in a carry into (addition) or a borrow
from (subtraction) the high order nibble. It is cleared to 0 by all other arithmetic operations.
F0: User Flag 0.
This is a bit-addressable, general purpose flag for use under software control.
These bits select which register bank is used during register accesses.
OV: Overflow Flag.
This bit is set to 1 under the following circumstances:
• An ADD, ADDC, or SUBB instruction causes a sign-change overflow.
• A MUL instruction results in an overflow (result is greater than 255).
• A DIV instruction causes a divide-by-zero condition.
The OV bit is cleared to 0 by the ADD, ADDC, SUBB, MUL, and DIV instructions in all other
cases.
F1: User Flag 1.
This is a bit-addressable, general purpose flag for use under software control.
PARITY: Parity Flag.
This bit is set to 1 if the sum of the eight bits in the accumulator is odd and cleared if the sum
is even.
all pages
0xD0
RS1
0
0
1
1
R/W
AC
Bit6
SFR Definition 9.8. PSW: Program Status Word
RS0
0
1
0
1
R/W
Bit5
F0
(bit addressable)
Register Bank
RS1
R/W
Bit4
0
1
2
3
C8051F360/1/2/3/4/5/6/7/8/9
Rev. 1.0
RS0
R/W
Bit3
0x00–0x07
0x08–0x0F
0x10–0x17
0x18–0x1F
Address
R/W
OV
Bit2
R/W
Bit1
F1
PARITY 00000000
Bit0
R
Reset Value
103
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