C8051F367-GM Silicon Laboratories Inc, C8051F367-GM Datasheet - Page 283
C8051F367-GM
Manufacturer Part Number
C8051F367-GM
Description
IC 8051 MCU 32K FLASH 28-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F36xr
Specifications of C8051F367-GM
Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
28-QFN
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 17x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C/SMBus/SPI/UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F360DK
Minimum Operating Temperature
- 40 C
On-chip Adc
21-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
28QFN EP
Device Core
8051
Family Name
C8051F36x
Maximum Speed
50 MHz
Operating Supply Voltage
3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1410 - KIT DEV FOR C8051F360 FAMILY
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1649
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F367-GM
Manufacturer:
Silicon Labs
Quantity:
135
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C8051F360/1/2/3/4/5/6/7/8/9
23.2. C2D Port Pin Requirements
Problem
The C2D debugging port pin (shared with P4.6 for C8051F360/3 and P3.0 for C8051F361/2/4/5/6/7/8/9)
behaves differently on "REV A" devices than specified in the data sheet.
On "REV A" devices, a C2D port pin that is pulled low by the associated port pin driver will disrupt debug-
ging capability. In order to communicate with the device through the C2 interface, the value in the port latch
associated C2D port pin must be '1'.
Workaround
To workaround this problem, add a strong pull-up resistor to the C2D port pin to ensure the pin will be high
unless explicitly driven low. Furthermore, the port pin should be left in open-drain mode with a '1' in the
appropriate port latch (PnMDOUT bit = '0', Pn bit = '1') when not in use. This will allow the debugging soft-
ware to transfer data via the C2D pin as often as possible.
This behavior has been corrected on "REV B" of this device.
Rev. 1.0
283
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