R5F21257SYFP#U0 Renesas Electronics America, R5F21257SYFP#U0 Datasheet - Page 283
![MCU 2KB FLASH 48K 52-LQFP](/photos/28/61/286101/52-lqfp_sml.jpg)
R5F21257SYFP#U0
Manufacturer Part Number
R5F21257SYFP#U0
Description
MCU 2KB FLASH 48K 52-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/25r
Specifications of R5F21257SYFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 105°C
Package / Case
52-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
14.3.12 Notes on Timer RD
Table 14.36
When the CSELi bit is set to 1, set the TSTARTi bit to 0 and the count
stops.
When the CSELi bit is set to 0, the count stops at compare match of
registers TRDi and TRDGRAi.
14.3.12.1 TRDSTR Register
14.3.12.2 TRDi Register (i = 0 or 1)
14.3.12.3 TRDSRi Register (i = 0 or 1)
When writing the value to the TRDSRi register and continuously reading the same register, the value before
writing may be read. In this case, execute the JMP.B instruction between the writing and reading.
• Set the TRDSTR register using the MOV instruction.
• When the CSELi (i = 0 to 1) is set to 0 (the count stops at compare match of registers TRDi and
• Therefore, set the TSTARTi bit to 0 to change other bits without changing the TSTARTi bit when the
• To stop counting by a program, set the TSTARTi bit after setting the CSELi bit to 1. Although the CSELi
• Table 14.36 lists the TRDIOji (j = A, B, C, or D) Pin Output Level when Count Stops to use the TRDIOji
• When writing the value to the TRDi register by a program while the TSTARTi bit in the TRDSTR register
• When writing the value to the TRDi register and continuously reading the same register, the value before
Feb 29, 2008
TRDGRAi), the count does not stop and the TSTARTi bit remains unchanged even if 0 (count stops) is
written to the TSTARTi bit.
CSELi bit is se to 0.
bit is set to 1 and the TSTARTi bit is set to 0 at the same time (with 1 instruction), the count cannot be
stopped.
(j = A, B, C, or D) pin with the timer RD output.
is set to 1 (count starts), avoid overlapping with the timing for setting the TRDi register to 0000h, and then
write. If the timing for setting the TRDi register to 0000h overlaps with the timing for writing the value to
the TRDi register, the value is not written and the TRDi register is set to 0000h.
- 001b (Clear by the TRDi register at compare match with the TRDGRAi register.)
- 010b (Clear by the TRDi register at compare match with the TRDGRBi register.)
- 011b (Synchronous clear)
- 101b (Clear by the TRDi register at compare match with the TRDGRCi register.)
- 110b (Clear by the TRDi register at compare match with the TRDGRDi register.)
writing may be read. In this case, execute the JMP.B instruction between the writing and reading.
These precautions are applicable when selecting the following by bits CCLR2 to CCLR0 in the
TRDCRi register.
Program example
Program example
TRDIOji (j = A, B, C, or D) Pin Output Level when Count Stops
Page 264 of 485
Count Stop
L1:
L1:
MOV.W
JMP.B
MOV.W
MOV.B
JMP.B
MOV.B
#XXXXh, TRD0
L1
TRD0,DATA
#XXh, TRDSR0
L1
TRDSR0,DATA
Hold the output level immediately before the
count stops.
Hold the output level after output changes by
compare match.
TRDIOji Pin Output when Count Stops
;Writing
;JMP.B
;Reading
;Writing
;JMP.B
;Reading
14. Timers
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