R5F21257SYFP#U0 Renesas Electronics America, R5F21257SYFP#U0 Datasheet - Page 338
![MCU 2KB FLASH 48K 52-LQFP](/photos/28/61/286101/52-lqfp_sml.jpg)
R5F21257SYFP#U0
Manufacturer Part Number
R5F21257SYFP#U0
Description
MCU 2KB FLASH 48K 52-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/25r
Specifications of R5F21257SYFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 105°C
Package / Case
52-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
16.2.4
Table 16.4
NOTES:
SSUMS and BIDE: Bits in SSMR2 register
MSS: Bit in SSCRH register
TE and RE: Bits in SSER register
Clock synchronous
communication mode
4-wire bus
communication mode
4-wire bus
(bidirectional)
communication mode
Communication Mode
1. This pin can be used as a programmable I/O port.
2. Do not set both bits TE and RE to 1 in 4-wire bus (bidirectional) communication mode.
Clock synchronous serial I/O with chip select switches the functions of the I/O pins in each communication
mode according to the setting of the MSS bit in the SSCRH register and bits RE and TE in the SSER register.
Table 16.4 shows the Association between Communication Modes and I/O Pins.
Feb 29, 2008
Communication Modes and Pin Functions
Association between Communication Modes and I/O Pins
(2)
Page 319 of 485
0
1
1
SSUMS
Disabled 0
0
1
BIDE
Bit Setting
1
0
1
0
1
MSS
0
1
0
1
0
1
0
1
0
1
0
1
TE
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
0
16. Clock Synchronous Serial Interface
RE
Input
−
Input
Input
−
Input
−
Output
Output
Input
−
Input
−
−
−
−
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
SSI
Pin State
Output
Output
Output
−
Output
−
Output
Input
−
Input
−
Output
Input
Output
Input
Output
(1)
(1)
(1)
(1)
SSO
Input
Input
Input
Output
Output
Output
Input
Input
Input
Output
Output
Output
Input
Input
Output
Output
SSCK
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