MC9S08GB60ACFUE Freescale Semiconductor, MC9S08GB60ACFUE Datasheet - Page 86
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MC9S08GB60ACFUE
Manufacturer Part Number
MC9S08GB60ACFUE
Description
IC MCU 60K FLASH 4K RAM 64-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08GT60ACFDER.pdf
(302 pages)
Specifications of MC9S08GB60ACFUE
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
56
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
S08GB
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
8
Operating Supply Voltage
0 V to 1.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
M68EVB908GB60E, M68DEMO908GB60E
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
For Use With
M68DEMO908GB60E - BOARD DEMO MC9S08GB60M68EVB908GB60E - BOARD EVAL FOR MC9S08GB60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Chapter 6 Parallel Input/Output
6.3.6
Port F is an 8-bit port general-purpose I/O that is not shared with any peripheral module. Port F has high
current output drivers.
Port F pins are available as general-purpose I/O pins controlled by the port F data (PTFD), data direction
(PTFDD), pullup enable (PTFPE), and slew rate control (PTFSE) registers. Refer to
I/O
6.3.7
Port G is an 8-bit port which is shared among the background/mode select function, oscillator, and
general-purpose I/O. When the background/mode select function or oscillator is enabled, the pin direction
will be controlled by the module function.
Port G pins are available as general-purpose I/O pins controlled by the port G data (PTGD), data direction
(PTGDD), pullup enable (PTGPE), and slew rate control (PTGSE) registers. Refer to
I/O
The internal pullup for PTG0 is enabled when the background/mode select function is enabled, regardless
of the state of PTGPE0. During reset, the BKGD/MS pin functions as a mode select pin. After the MCU
is out of reset, the BKGD/MS pin becomes the background communications input/output pin. The PTG0
can be configured to be a general-purpose output pin. Refer to
Chapter 5, “Resets, Interrupts, and System
more information about using this pin.
The ICG module can be configured to use PTG2–PTG1 ports as crystal oscillator or external clock pins.
Refer to
oscillator pins.
86
Controls”
Controls”
Port G
Port F
Chapter 13, “Inter-Integrated Circuit
Port F and High-Current Drivers
Port G, BKGD/MS, and Oscillator
for more information about general-purpose I/O control.
for more information about general-purpose I/O control.
MCU Pin:
MCU Pin:
PTG7
PTF7
Bit 7
Bit 7
PTG6
MC9S08GB60A Data Sheet, Rev. 2
PTF6
Figure 6-8. Port G Pin Names
Figure 6-7. Port F Pin Names
6
6
Configuration”, and
(S08IICV1)” for more information about using these pins as
PTG5
PTF5
5
5
PTG4
PTF4
4
4
Chapter 3, “Modes of
Chapter 15, “Development
PTG3
PTF3
3
3
EXTAL
PTG2/
PTF2
2
2
PTG1/
XTAL
PTF1
Section 6.4, “Parallel
Section 6.4, “Parallel
Freescale Semiconductor
1
1
Operation”,
BKGD/MS
Support” for
PTG0/
PTF0
Bit 0
Bit 0
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