R5F2L3A7ANFP#U1 Renesas Electronics America, R5F2L3A7ANFP#U1 Datasheet - Page 626
R5F2L3A7ANFP#U1
Manufacturer Part Number
R5F2L3A7ANFP#U1
Description
MCU FLASH 48+4KB 64LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/3AAr
Datasheet
1.R5F2L387ANFPU1.pdf
(864 pages)
Specifications of R5F2L3A7ANFP#U1
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
88
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 589 of 802
27.2.11 Slave Address Register (SAR)
27.2.12 IIC bus Shift Register (ICDRS)
b7 to b0
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Bit
Address 019Dh
Symbol
Symbol
Symbol
Bit
Bit
SVA0
SVA1
SVA2
SVA3
SVA4
SVA5
SVA6
This register transmits and receives data.
During transmission, data is transferred from registers ICRDT to ICDRS and transmitted from the
SDA pin.
During reception, data is transferred from registers ICDRS to the ICDRR after 1 byte of data is
received.
FS
SVA6
b7
b7
—
0
Format select bit
Slave address 6 to 0
SVA5
b6
b6
—
0
Oct 30, 2009
Bit Name
SVA4
b5
b5
—
0
SVA3
b4
b4
—
0
Function
0: I
1: Clock synchronous serial format
Set an address different from that of the other slave
devices connected to the I
When the 7 high-order bits of the first frame
transmitted after the start condition match bits
SVA0 to SVA6 in slave mode of the I
the MCU operates as a slave device.
SVA2
b3
b3
—
0
2
C bus format
SVA1
b2
b2
—
0
Function
SVA0
b1
b1
—
0
2
C bus.
FS
b0
b0
—
0
2
C bus format,
27. I
2
C bus Interface
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
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