R5F2L3A7ANFP#U1 Renesas Electronics America, R5F2L3A7ANFP#U1 Datasheet - Page 653
R5F2L3A7ANFP#U1
Manufacturer Part Number
R5F2L3A7ANFP#U1
Description
MCU FLASH 48+4KB 64LQFP
Manufacturer
Renesas Electronics America
Series
R8C/Lx/3AAr
Datasheet
1.R5F2L387ANFPU1.pdf
(864 pages)
Specifications of R5F2L3A7ANFP#U1
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LCD, POR, PWM, Voltage Detect, WDT
Number Of I /o
88
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
REJ09B0441-0100 Rev.1.00
Page 616 of 802
28.2
28.3
Table 28.1
Note:
28.3.1
Receive data input
Transmit data output
Table 28.1 lists the Hardware LIN Pin Configuration.
The hardware LIN contains the following registers:
•
•
•
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
1. To use the hardware LIN, set the TXD0SEL0 bit in the U0SR register to 1 and bits RXD0SEL1 to
LIN Control Register 2 (LINCR2)
LIN Control Register (LINCR)
LIN Status Register (LINST)
Address 0105h
Symbol
RXD0SEL0 to 10b.
Input/Output Pins
Registers
Name
Symbol
Bit
BCE
LIN Control Register 2 (LINCR2)
—
—
—
—
—
—
—
Hardware LIN Pin Configuration
b7
—
0
Bus collision detection enable bit during Sync Break
transmission
Reserved bits
Nothing is assigned. If necessary, set to 0. When read, the content is 0.
Pin Name
b6
—
RXD0
TXD0
0
Oct 30, 2009
b5
—
0
Assigned Pin
Bit Name
P11_4
P13_1
b4
—
0
Output
Input
I/O
b3
—
0
Receive data input for the hardware LIN
Transmit data output for the hardware LIN
b2
—
0
Set to 0.
0: Bus collision detection disabled
1: Bus collision detection enabled
b1
—
0
Function
Function
BCE
b0
0
28. Hardware LIN
R/W
R/W
R/W
—
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