MC908GZ16MFAE Freescale Semiconductor, MC908GZ16MFAE Datasheet - Page 275

• Manufacturer Part Number: MC908GZ16MFAE
• Description: IC MCU 16K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GZ16MFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: CAN, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 37
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: CAN, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GZ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: ESCI, SPI, UART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

20.2.2.3 Break Status Register
The break status register (BSR) contains a flag to indicate that a break caused an exit from wait mode.
This register is only used in emulation mode.
SBSW — SIM Break Stop/Wait
20.2.2.4 Break Flag Control Register
The break control register (BFCR) contains a bit that enables software to clear status bits while the MCU
is in a break state.
BCFE — Break Clear Flag Enable Bit
20.2.3 Low-Power Modes
The WAIT and STOP instructions put the MCU in low power- consumption standby modes. If enabled,
the break module will remain enabled in wait and stop modes. However, since the internal address bus
does not increment in these modes, a break interrupt will never be triggered.
20.3 Monitor ROM (MON)
This subsection describes the monitor ROM (MON) and the monitor mode entry methods. The monitor
ROM allows complete testing of the microcontroller unit (MCU) through a single-wire interface with a host
Freescale Semiconductor
SBSW can be read within the break state SWI routine. The user can modify the return address on the
stack by subtracting one from it.
This read/write bit enables software to clear status bits by accessing status registers while the MCU is
in a break state. To clear status bits during the break state, the BCFE bit must be set.
1 = Wait mode was exited by break interrupt
0 = Wait mode was not exited by break interrupt
1 = Status bits clearable during break
0 = Status bits not clearable during break
Address: $FE00
Address: $FE03
Reset:
Read:
Reset:
Write:
Read:
Write:
BCFE
Bit 7
Bit 7
R
R
R
0
Figure 20-7. Break Flag Control Register (BFCR)
MC68HC908GZ16 • MC68HC908GZ8 Data Sheet, Rev. 4
Figure 20-6. Break Status Register (BSR)
= Reserved
= Reserved
R
6
R
6
R
5
R
5
R
4
R
4
1. Writing a logic 0 clears SBSW.
R
3
R
3
R
2
R
2
Note
SBSW
1
0
R
1
(1)
Monitor ROM (MON)
Bit 0
Bit 0
R
R
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