MC68HC908LK24CFU Freescale Semiconductor, MC68HC908LK24CFU Datasheet - Page 17

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MC68HC908LK24CFU

Manufacturer Part Number
MC68HC908LK24CFU
Description
IC MCU 24K FLASH 8MHZ SPI 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908LK24CFU

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
40
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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MC68HC908LJ24/LK24 — Rev. 2.1
Freescale Semiconductor
14.11.2 Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .307
14.12 SPI During Break Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . 308
14.13 I/O Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 308
14.13.1 MISO (Master In/Slave Out) . . . . . . . . . . . . . . . . . . . . . . . . 309
14.13.2 MOSI (Master Out/Slave In) . . . . . . . . . . . . . . . . . . . . . . . . 309
14.13.3 SPSCK (Serial Clock). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 310
14.13.4 SS (Slave Select) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 310
14.13.5 CGND (Clock Ground) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 311
14.14 I/O Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 312
14.14.1 SPI Control Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 312
14.14.2 SPI Status and Control Register . . . . . . . . . . . . . . . . . . . . 314
14.14.3 SPI Data Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 317
15.1
15.2
15.3
15.4
15.5
15.5.1
15.5.2
15.5.3
15.5.4
15.5.5
15.5.6
15.6
16.1
16.2
16.3
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .319
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 319
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 320
Multi-Master IIC Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . 321
Programming Considerations . . . . . . . . . . . . . . . . . . . . . . . . . 330
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .333
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 334
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 334
I/O Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 320
Section 16. Analog-to-Digital Converter (ADC)
Section 15. Multi-Master IIC Interface (MMIIC)
Multi-Master IIC Address Register (MMADR) . . . . . . . . . . 321
Multi-Master IIC Control Register (MMCR) . . . . . . . . . . . . 323
Multi-Master IIC Master Control Register (MIMCR) . . . . . . 324
Multi-Master IIC Status Register (MMSR) . . . . . . . . . . . . . 326
Multi-Master IIC Data Transmit Register (MMDTR) . . . . . . 328
Multi-Master IIC Data Receive Register (MMDRR) . . . . . . 329
Table of Contents
Table of Contents
Data Sheet
17

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