MC68HC705C8AFNE Freescale Semiconductor, MC68HC705C8AFNE Datasheet - Page 61

• Manufacturer Part Number: MC68HC705C8AFNE
• Description: IC MCU 8BIT 44-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of MC68HC705C8AFNE

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: OTP
• Ram Size: 304 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-PLCC
• Processor Series: HC705C
• Core: HC05
• Data Bus Width: 8 bit
• Data Ram Size: 304 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 2.1 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 1
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

5.1 Contents
5.2 Introduction
5.3 Reset Sources
MC68HC705C8A — Rev. 3
MOTOROLA
Technical Data — MC68HC705C8A
5.2
5.3
5.3.1
5.3.2
5.3.3
5.3.3.1
5.3.3.2
5.3.4
This section describes how resets initialize the microcontroller unit
(MCU).
A reset immediately stops the operation of the instruction being
executed, initializes certain control bits, and loads the program counter
with a user-defined reset vector address. These conditions produce a
reset:
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Freescale Semiconductor, Inc.
For More Information On This Product,
Power-on reset (POR) — Initial power-up
External reset — A logic 0 applied to the RESET pin
Internal programmable computer operating properly (COP)
watchdog timer reset
Internal non-programmable COP watchdog timer reset
Internal clock monitor reset
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Reset Sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Power-On Reset (POR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
External Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Programmable and Non-Programmable
Clock Monitor Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Programmable COP Watchdog Reset . . . . . . . . . . . . . . .63
Non-Programmable COP Watchdog . . . . . . . . . . . . . . . . 66
Go to: www.freescale.com
COP Watchdog Resets . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Resets
Section 5. Resets
Technical Data