M30800SAGP#U5 Renesas Electronics America, M30800SAGP#U5 Datasheet - Page 95
M30800SAGP#U5
Manufacturer Part Number
M30800SAGP#U5
Description
IC M32C/80 MCU ROMLESS 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet
1.M30800SAGP-BLU5.pdf
(354 pages)
Specifications of M30800SAGP#U5
Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
45
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30800SAGP#U5M30800SAGP#D3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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M
R
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e
E
3
. v
J
2
Table 8.7 Pin States in Wait Mode
0
C
________
Address Bus, Data Bus, CS0 to CS3,
BHE
RD, WR, WRL, WRH
__________
HLDA, BCLK
ALE
Ports
CLK
_____
1
9
0 .
8 /
B
0
0
8.5.2.3 Pin Status in Wait Mode
8.5.2.4 Exiting Wait Mode
0
2
OUT
______
Table 8.7 lists pin states in wait mode.
Wait mode is exited by the hardware reset, NMI interrupt or peripheral function interrupts.
When the hardware reset or NMI interrupt, but not the peripheral function interrupts, is used to exit wait
mode, set the ILVL2 to ILVL0 bits for the peripheral function interrupts to "000
before executing the WAIT instruction.
CM02 bit setting affects the peripheral function interrupts. When the CM02 bit in the CM0 register is
set to "0" (peripheral function clock does not stop in wait mode), all peripheral function interrupts can
be used to exit wait mode. When the CM02 bit is set to "1" (peripheral function clock stops in wait
mode), peripheral functions using the peripheral function clock stop. Therefore, the peripheral function
interrupts cannot be used to exit wait mode. However, the peripheral function interrupts caused by an
external clock, f
to exit wait mode.
The CPU clock used when exiting wait mode by the peripheral function interrupts or NMI interrupt is
the same CPU clock used when the WAIT instruction is executed.
Table 8.8 shows interrupts to be used to exit wait mode and usage conditions.
7
G
N
1
o
o r
0 -
. v
________
u
1
p
0
0
, 1
0
2
_________
0
0
5
When f
When f
Pin
Page 74
C32
_______
8
C
, or f
, f
is selected
32
are selected
2n
_______
f o
whose count source is the X
3
_______
3
0
Maintains state immediately
before entering wait mode
"H"
"H"
"L"
Maintains state immediately before entering wait mode
Outputs clock
Outputs the clock when the CM02 bit in the CM0 register is set to "0"
(peripheral function clock does not stop in wait mode).
Maintains state immediately before entering wait mode when the CM02
bit is set to "1" (peripheral function clock stops in wait mode).
Memory Expansion Mode
Microprocessor Mode
_______
IN
clock or on-chip oscillator clock, can be used
8. Clock Generation Circuit
Single-Chip Mode
2
" (interrupt disabled)
_______
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