MC68HC16Z1CAG25 Freescale Semiconductor, MC68HC16Z1CAG25 Datasheet - Page 453

• Manufacturer Part Number: MC68HC16Z1CAG25
• Description: IC MCU 16BIT 25MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CAG25

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Cpu Family: HC16
• Device Core Size: 16b
• Frequency (max): 25MHz
• Interface Type: SCI/SPI/UART
• Program Memory Size: Not Required
• Total Internal Ram Size: 1KB
• # I/os (max): 16
• Number Of Timers - General Purpose: 11
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Controller Family/series: 68HC16
• No. Of I/o's: 16
• Ram Memory Size: 1KB
• Cpu Speed: 25MHz
• No. Of Timers: 2
• Embedded Interface Type: QSPI, SCI
• Rohs Compliant: Yes
• Processor Series: HC16Z
• Core: CPU16
• Data Bus Width: 16 bit
• Data Ram Size: 1 KB
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 11
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Compliant

E.1 Initialization Programs
M68HC16 Z SERIES
USER’S MANUAL
This section contains basic initialization programs and several programming exercises
using different M68HC16 Z-series modules. The purpose of these exercises is to pro-
vide the designer and programmer with a means to shorten design time. All of the pro-
grams were written to run on the M68HC16Z1EVB evaluation board. Refer to the
M68HC16Z1EVB Evaluation Board User’s Manual (M68HC16Z1EVB/D) for further in-
formation.
The following initialization routines accompany the programming examples used in
this manual. For information on assembler commands and directives, refer to the
M68HC16Z1EVB Evaluation Board User’s Manual (M68HC16Z1EVB/D).
• EQUATES.ASM — This program lists of all the MC68HC16 registers equated to
• ORG00000.ASM — This program consists of five lines of code that set the reset
• ORG00008.ASM — This program initializes the interrupt/exception vectors
• INITSYS.ASM — This program consists of ten to twelve lines of code that initial-
• INITRAM.ASM — This program initializes the 1-Kbyte internal SRAM at $10000,
• INITSCI.ASM — This program initializes the SCI to transmit and receive at 9600
their memory address. This allows programmers to use the register name in their
programs, and then the assembler selects the correct memory address for that
register.
vector information into the proper locations.
($0008 – $01FE). If an interrupt occurs requiring the use of any of these vectors,
program flow continues at the label “BDM”. The programmer must add code at
the label location to put the program running on the EVB16 into background de-
bug mode or some other appropriate routine.
ize the system clock, set the extension registers, and chip-selects. It also turns off
the COP (software watchdog) that is set to “on” after reset.
and sets the stack inside it.
baud.
INITIALIZATION AND PROGRAMMING EXAMPLES
These programs will also work on the Modular Evaluation Board
(MEVB) using a microcontroller personality board for the appropriate
Z-series derivative. See
for more information on the MEVB.
These programs and others can be obtained from the Freescale web
site at http://www.freescale.com
INITIALIZATION AND PROGRAMMING EXAMPLES
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
APPENDIX E
APPENDIX C DEVELOPMENT SUPPORT
NOTE
NOTE
E-1