HD6417020SVX12IV Renesas Electronics America, HD6417020SVX12IV Datasheet - Page 154

• Manufacturer Part Number: HD6417020SVX12IV
• Description: MCU 3/5V 0K PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7020r

Specifications of HD6417020SVX12IV

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 12.5MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

8.5
When the DRAM enable bit (DRAME) of the BCR is set to 1, area 1 becomes DRAM space and
the DRAM interface function is available, which permits direct connection of this LSI to DRAMs.
8.5.1
When the multiplex enable bit (MXE) of the DRAM area control register (DCR) is set to 1, row
addresses and column addresses are multiplexed. This allows DRAMs that require multiplexing of
row and column addresses to be connected directly to the SH microprocessors without additional
multiplexing circuits. When addresses are multiplexed (MXE = 1), setting of the DCR’s multiplex
shift bits (MXC1, MXC0) allows selection of eight, nine and ten-bit row address shifting. Table
8.9 illustrates the relationship between MXC1/MXC0 bits and address multiplexing.
134 RENESAS
DRAM Interface Operation
DRAM Address Multiplexing