HD6417020SVX12IV Renesas Electronics America, HD6417020SVX12IV Datasheet - Page 284

• Manufacturer Part Number: HD6417020SVX12IV
• Description: MCU 3/5V 0K PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7020r

Specifications of HD6417020SVX12IV

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 12.5MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

5. GRA3 is the waveform period register. Set the upper limit of TCNT3–1*. Set the transition
6. Set the STR3 and STR4 bits in the TSTR to 1 to let TCNT3 and TCNT4 start counting.
Complementary PWM Mode Operation: Figure 10.34 shows an example of operation in the
complementary PWM mode. TCNT3 and TCNT4 operate as up/downcounters, counting down
from compare match of TCNT3 and GRA3 and counting up when TCNT4 underflows. PWM
waveforms are output by repeated compare matches with each of the general registers in the
266 RENESAS
Note
times of the PWM output waveforms in GRB3, GRA4, and GRB4. Set times within the
compare match range of TCNT3 and TCNT4.
Note:
T
(X: initial setting of GRB3, GRA4, and GRB4; T: initial setting of TCNT3)
To re-engage the complementary PWM mode after it has been aborted, start settings
from step 1.
Figure 10.33 Procedure for Selecting the Complementary PWM Mode
GRA3 = [cycle count/2] + [count of non-overlaps] – 2cyc=[upper limit of TCNT3] – 1
X
Complementary PWM mode
Complementary PWM mode
Select complementary
Set general registers
Select counter clock
Start counting
Stop counting
PWM mode
Set TCNT
(1)
(4)
(6)
(2)
(3)
(5)