DF2110BVTE10 Renesas Electronics America, DF2110BVTE10 Datasheet - Page 126

MCU 3V 64K 100-TQFP

DF2110BVTE10

Manufacturer Part Number
DF2110BVTE10
Description
MCU 3V 64K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2110BVTE10

Core Processor
H8S/2000
Core Size
16-Bit
Speed
10MHz
Connectivity
Host Interface (LPC), I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
82
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
HD64F2110BVTE10
HD64F2110BVTE10

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2110BVTE10V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 5 Interrupt Controller
Rev. 2.00 Mar 21, 2006 page 86 of 518
REJ09B0299-0200
Break request
(1) When a break address specified instruction is executed for one state in the program area and on-chip memory
Break request
(2) When a break address specified instruction is executed for two states in the program area and on-chip memory
Address bus
Address bus
signal
signal
φ
φ
H'0310 NOP
H'0312 MOV.W #xx:16,Rd
H'0316 NOP
H'0318 NOP
Instruction
Instruction
H'0310
H'0310
fetch
fetch
Figure 5.9 Address Break Timing Example
H'0310 NOP
H'0312 NOP
H'0314 NOP
H'0316 NOP
execution
execution
NOP
Instruction
Instruction
NOP
H'0312 H'0314 H'0316
H'0312 H'0314 H'0316
fetch
fetch
execution
Instruction
Instruction
NOP
fetch
fetch
execution
MOV.W
Instruction
Instruction
Break point
execution
fetch
fetch
NOP
Break point
Instruction
Instruction
fetch
fetch
H'0318
H'0318
NOP instruction is executed at break point address
H'0312 and following address H'0314.
Fetching is performed from address H'0316
after exception handling ends.
operation
operation
Internal
Internal
MOV instruction is executed at break point address
H'0312, and NOP instruction is not executed
at the following address H'0314.
Fetching is performed from address H'0316
after exception handling ends.
Interrupt exception handling
Interrupt exception handling
SP-2
SP-2
to stack
to stack
Save
Save
SP-4
SP-4
Vector
Vector
fetch
fetch
H'0036
H'0036
Internal
operation
Internal
operation
Instruction
Instruction
fetch
fetch

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