MC9S12XDP512CAG Freescale Semiconductor, MC9S12XDP512CAG Datasheet - Page 1319

• Manufacturer Part Number: MC9S12XDP512CAG
• Description: IC MCU 512K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XDP512CAG

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 119
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: S12XD
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 32 KB
• Interface Type: CAN/I2C/SCI/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 119
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12XDP512E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (24-ch x 10-bit)
• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 119
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• For Use With: DEMO9S12XDT512E - BOARD DEMO FOR MC9S12XDT512EVB9S12XDP512E - BOARD DEMO FOR MC9S12XDP512
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

0x00C8–0x00CF Asynchronous Serial Interface (SCI0) Map
1
2
0x00D0–0x00D7 Asynchronous Serial Interface (SCI1) Map
Freescale Semiconductor
Address
Address
0x00CC
0x00CD
0x00C8
0x00C9
0x00CA
0x00C8
0x00C9
0x00CA
0x00CB
0x00CE
0x00CF
0x00D0
0x00D1
0x00D2
0x00D0
0x00D1
0x00D2
0x00D3
0x00D4
Those registers are accessible if the AMAP bit in the SCI0SR2 register is set to zero
Those registers are accessible if the AMAP bit in the SCI0SR2 register is set to one
SCI0ASR1
SCI0ACR1
SCI0ACR2
SCI1ASR1
SCI1ACR1
SCI1ACR2
SCI0BDH
SCI1BDH
SCI0BDL
SCI0CR1
SCI1BDL
SCI1CR1
SCI0DRH
SCI0CR2
SCI0DRL
SCI1CR2
SCI0SR1
SCI0SR2
SCI1SR1
Name
Name
1
1
1
1
1
1
2
2
2
2
2
2
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
RXEDGIE
RXEDGIE
RXEDGIF
RXEDGIF
LOOPS
LOOPS
AMAP
TDRE
TDRE
SBR7
SBR7
IREN
IREN
Bit 7
Bit 7
TIE
TIE
R8
R7
T7
0
0
SCISWAI
SCISWAI
MC9S12XDP512 Data Sheet, Rev. 2.21
SBR6
SBR6
TNP1
TNP1
TCIE
TCIE
Bit 6
Bit 6
TC
TC
R6
T8
T6
0
0
0
0
0
0
0
RSRC
RDRF
RSRC
RDRF
TNP0
SBR5
TNP0
SBR5
Bit 5
Bit 5
RIE
RIE
R5
T5
0
0
0
0
0
0
0
0
SBR12
TXPOL
SBR12
SBR4
SBR4
Bit 4
IDLE
Bit 4
IDLE
ILIE
ILIE
R4
T4
M
M
0
0
0
0
0
0
0
RXPOL
SBR11
SBR11
WAKE
WAKE
SBR3
SBR3
Bit 3
Bit 3
OR
OR
TE
R3
TE
T3
0
0
0
0
0
0
0
BERRM1
BERRM1
BERRV
BERRV
SBR10
BRK13
SBR10
SBR2
SBR2
Appendix G Detailed Register Map
Bit 2
Bit 2
ILT
RE
NF
ILT
RE
NF
R2
T2
0
0
0
BERRM0
BERRM0
BERRIF
BERRIE
BERRIF
BERRIE
TXDIR
SBR9
SBR1
SBR9
SBR1
RWU
RWU
Bit 1
Bit 1
PE
PE
FE
R1
FE
T1
0
BKDFE
BKDFE
BKDIE
BKDIE
BKDIF
BKDIF
SBR8
SBR0
SBR8
SBR0
Bit 0
Bit 0
SBK
RAF
SBK
PT
PF
R0
PT
PF
T0
0
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