MC9S12XDP512CAG Freescale Semiconductor, MC9S12XDP512CAG Datasheet - Page 482

IC MCU 512K FLASH 144-LQFP

MC9S12XDP512CAG

Manufacturer Part Number
MC9S12XDP512CAG
Description
IC MCU 512K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XDP512CAG

Core Processor
HCS12X
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
S12XD
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN/I2C/SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
119
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
EVB9S12XDP512E
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (24-ch x 10-bit)
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Total Internal Ram Size
32KB
# I/os (max)
119
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
For Use With
DEMO9S12XDT512E - BOARD DEMO FOR MC9S12XDT512EVB9S12XDP512E - BOARD DEMO FOR MC9S12XDP512
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 11 Serial Communication Interface (S12SCIV5)
11.3.2.1
Read: Anytime, if AMAP = 0. If only SCIBDH is written to, a read will not return the correct data until
SCIBDL is written to as well, following a write to SCIBDH.
Write: Anytime, if AMAP = 0.
The SCI baud rate register is used by to determine the baud rate of the SCI, and to control the infrared
modulation/demodulation submodule.
482
SBR[12:0]
TNP[1:0]
Reset
Reset
Field
IREN
6:5
4:0
7:0
7
W
W
R
R
SBR7
IREN
Infrared Enable Bit — This bit enables/disables the infrared modulation/demodulation submodule.
0 IR disabled
1 IR enabled
Transmitter Narrow Pulse Bits — These bits enable whether the SCI transmits a 1/16, 3/16, 1/32 or 1/4 narrow
pulse. See
SCI Baud Rate Bits — The baud rate for the SCI is determined by the bits in this register. The baud rate is
calculated two different ways depending on the state of the IREN bit.
The formulas for calculating the baud rate are:
Note: The baud rate generator is disabled after reset and not started until the TE bit or the RE bit is set for the
Note: Writing to SCIBDH has no effect without writing to SCIBDL, because writing to SCIBDH puts the data in
SCI Baud Rate Registers (SCIBDH, SCIBDL)
0
0
7
7
When IREN = 0 then,
When IREN = 1 then,
Those two registers are only visible in the memory map if AMAP = 0 (reset
condition).
SCI baud rate = SCI bus clock / (16 x SBR[12:0])
SCI baud rate = SCI bus clock / (32 x SBR[12:1])
first time. The baud rate generator is disabled when (SBR[12:0] = 0 and IREN = 0) or (SBR[12:1] = 0 and
IREN = 1).
a temporary location until SCIBDL is written to.
Table
SBR6
TNP1
0
0
6
6
11-2.
Table 11-1. SCIBDH and SCIBDL Field Descriptions
Figure 11-3. SCI Baud Rate Register (SCIBDH)
Figure 11-4. SCI Baud Rate Register (SCIBDL)
MC9S12XDP512 Data Sheet, Rev. 2.21
TNP0
SBR5
0
0
5
5
SBR12
SBR4
NOTE
0
0
4
4
Description
SBR11
SBR3
0
0
3
3
SBR10
SBR2
0
0
2
2
Freescale Semiconductor
SBR9
SBR1
0
0
1
1
SBR8
SBR0
0
0
0
0

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