M30873FHGP#U3 Renesas Electronics America, M30873FHGP#U3 Datasheet - Page 168

IC M32C/87 MCU FLASH 100LQFP

M30873FHGP#U3

Manufacturer Part Number
M30873FHGP#U3
Description
IC M32C/87 MCU FLASH 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet

Specifications of M30873FHGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M30873FHGP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
M30873FHGP#U3M30873FHGP#U5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 144 of 587
Figure 13.5
DMA Mode Register 0
b7 b6 b5 b4
NOTE:
1. Use the LDC instruction to set the DMD0 register.
b3
b2
DMD0 Register
b1
b0
Bit Symbol
MD00
MD01
MD10
MD11
BW0
RW0
BW1
RW1
Symbol
DMD0
(1)
Channel 0
transfer mode select bits
Channel 0
transfer unit select bit
Channel 0
transfer direction select bit
Channel 1
transfer mode select bits
Channel 1
transfer unit select bit
Channel 1
transfer direction select bit
Bit Name
Address
(CPU internal register)
b1 b0
0 0: DMA disabled
0 1: Single transfer
1 0: Do not set to this value
1 1: Repeat transfer
0: 8 bits
1: 16 bits
0: Fixed address to incremented address
1: Incremented address to fixed address
b5 b4
0 0: DMA disabled
0 1: Single transfer
1 0: Do not set to this value
1 1: Repeat transfer
0: 8 bits
1: 16 bits
0: Fixed address to incremented address
1: Incremented address to fixed address
Function
After Reset
00h
RW
RW
RW
RW
RW
RW
RW
RW
RW
13. DMAC

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