M30873FHGP#U3 Renesas Electronics America, M30873FHGP#U3 Datasheet - Page 210

IC M32C/87 MCU FLASH 100LQFP

M30873FHGP#U3

Manufacturer Part Number
M30873FHGP#U3
Description
IC M32C/87 MCU FLASH 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet

Specifications of M30873FHGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M30873FHGP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
M30873FHGP#U3M30873FHGP#U5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 186 of 587
Figure 15.23
Timer Bi Mode Register (i = 0 to 5)(Event Counter Mode)
b7
b6 b5 b4
NOTES:
0
1. Bits MR1 and MR0 are enabled when the TCK1 bit is set to 0. Bits MR1 and MR0 can be set to either 0 or 1 when the TCK1 bit
2. j = i - 1, except j = 2 if i = 0 and j = 5 if i = 3.
is set to 1.
b3
b2
TB0MR to TB5MR Registers in Event Counter Mode
b1
0
b0
1
Bit Symbol
TMOD0
TMOD1
TCK0
TCK1
MR0
MR1
MR2
MR3
Symbol
TB0MR to TB5MR
Operating mode select bits
Count polarity select bits
Registers TB0MR and TB3MR:
Registers TB1MR, TB2MR, TB4MR, and TB5MR:
Disabled in event counter mode.
Write 0. Read as undefined value.
Disabled in event counter mode.
Can be set to either 0 or 1
Event clock select bit
Set to 0 in event counter mode.
Unimplemented.
Write 0. Read as undefined value.
Bit Name
Address
035Bh, 035Ch, 035Dh, 031Bh, 031Ch, 031Dh
(1)
b1 b0
0 1: Event counter mode
0: Signal applied to the TBiIN pin
1: TBj overflows or underflows
b3 b2
0 0: Falling edges of an external signal counted
0 1: Rising edges of an external signal counted
1 0: Falling and rising edges of an external
1 1: Do not set to this value
signal counted
Function
(2)
After Reset
00XX 0000b
RW
RW
RW
RW
RW
RW
RW
RW
15. Timer B

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